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authorStephen Warren <swarren@nvidia.com>2013-11-25 17:53:16 -0700
committerStephen Warren <swarren@nvidia.com>2013-12-16 14:09:16 -0700
commit58ecb23f64ee3a2ef66bb55b2e1e841385b6d08b (patch)
tree91933b662c5ea802874259c9a1b555774834c4f2 /arch/arm/boot/dts/tegra20-paz00.dts
parent18f48a4f1d49d522285b5a9f3c5d984f4fdaae01 (diff)
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ARM: tegra: add missing unit addresses to DT
DT node names should include a unit address iff the node has a reg property. For Tegra DTs at least, we were previously applying a different rule, namely that node names only needed to include a unit address if it was required to make the node name unique. Consequently, many unit addresses are missing. Add them. Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra20-paz00.dts')
-rw-r--r--arch/arm/boot/dts/tegra20-paz00.dts12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts
index e57fb3aefc2a..4b961b1b4252 100644
--- a/arch/arm/boot/dts/tegra20-paz00.dts
+++ b/arch/arm/boot/dts/tegra20-paz00.dts
@@ -10,8 +10,8 @@
reg = <0x00000000 0x20000000>;
};
- host1x {
- hdmi {
+ host1x@50000000 {
+ hdmi@54280000 {
status = "okay";
vdd-supply = <&hdmi_vdd_reg>;
@@ -23,7 +23,7 @@
};
};
- pinmux {
+ pinmux@70000014 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
@@ -268,7 +268,7 @@
clock-frequency = <100000>;
};
- nvec {
+ nvec@7000c500 {
compatible = "nvidia,nvec";
reg = <0x7000c500 0x100>;
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
@@ -417,7 +417,7 @@
};
};
- pmc {
+ pmc@7000e400 {
nvidia,invert-interrupt;
nvidia,suspend-mode = <1>;
nvidia,cpu-pwr-good-time = <2000>;
@@ -474,7 +474,7 @@
#address-cells = <1>;
#size-cells = <0>;
- clk32k_in: clock {
+ clk32k_in: clock@0 {
compatible = "fixed-clock";
reg=<0>;
#clock-cells = <0>;