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| author | Josh Cartwright <josh.cartwright@ni.com> | 2012-10-31 13:56:14 -0600 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2012-11-14 16:10:42 +0100 |
| commit | 91dc985c5e51af7036c1ccf9cea1b05662c96791 (patch) | |
| tree | dd34ce5f4a2946cacf11bfceecce653792158d31 /arch/arm/boot/dts/zynq-7000.dtsi | |
| parent | 0f586fbf6f6a9119392a5cb0f193ac11c753b09e (diff) | |
| download | linux-91dc985c5e51af7036c1ccf9cea1b05662c96791.tar.gz linux-91dc985c5e51af7036c1ccf9cea1b05662c96791.tar.bz2 linux-91dc985c5e51af7036c1ccf9cea1b05662c96791.zip | |
ARM: zynq: add clk binding support to the ttc
Add support for retrieving TTC configuration from device tree. This
includes the ability to pull information about the driving clocks from
the of_clk bindings.
Signed-off-by: Josh Cartwright <josh.cartwright@ni.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/boot/dts/zynq-7000.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/zynq-7000.dtsi | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi index bb3085ca4f06..401c1262d4ed 100644 --- a/arch/arm/boot/dts/zynq-7000.dtsi +++ b/arch/arm/boot/dts/zynq-7000.dtsi @@ -109,5 +109,58 @@ }; }; }; + + ttc0: ttc0@f8001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "xlnx,ttc"; + reg = <0xF8001000 0x1000>; + clocks = <&cpu_clk 3>; + clock-names = "cpu_1x"; + clock-ranges; + + ttc0_0: ttc0.0 { + status = "disabled"; + reg = <0>; + interrupts = <0 10 4>; + }; + ttc0_1: ttc0.1 { + status = "disabled"; + reg = <1>; + interrupts = <0 11 4>; + }; + ttc0_2: ttc0.2 { + status = "disabled"; + reg = <2>; + interrupts = <0 12 4>; + }; + }; + + ttc1: ttc1@f8002000 { + #interrupt-parent = <&intc>; + #address-cells = <1>; + #size-cells = <0>; + compatible = "xlnx,ttc"; + reg = <0xF8002000 0x1000>; + clocks = <&cpu_clk 3>; + clock-names = "cpu_1x"; + clock-ranges; + + ttc1_0: ttc1.0 { + status = "disabled"; + reg = <0>; + interrupts = <0 37 4>; + }; + ttc1_1: ttc1.1 { + status = "disabled"; + reg = <1>; + interrupts = <0 38 4>; + }; + ttc1_2: ttc1.2 { + status = "disabled"; + reg = <2>; + interrupts = <0 39 4>; + }; + }; }; }; |