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authorStephen Warren <swarren@nvidia.com>2012-04-12 15:46:49 -0600
committerStephen Warren <swarren@nvidia.com>2012-04-25 15:22:09 -0600
commitaa607ebf93a5fc26275a575781399df971dd1b91 (patch)
tree93dcb6f1af5f6d7e64663a4ce9e45e889866309e /arch/arm/boot/dts
parent60d148b9f838b718e4808061ee6d5833de77fd9c (diff)
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ARM: tegra: add USB ULPI PHY reset GPIO to device tree
ULPI PHYs have a reset signal, and different boards use a different GPIO for this task. Add a property to device tree to represent this. I'm not sure if adding this property to the EHCI controller node is entirely correct; perhaps eventually we should have explicit separate nodes for the various PHYs. However, we don't have that right now, so this binding seems like a reasonable choice. Cc: <devicetree-discuss@lists.ozlabs.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: <linux-usb@vger.kernel.org> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/arm/boot/dts')
-rw-r--r--arch/arm/boot/dts/tegra-harmony.dts4
-rw-r--r--arch/arm/boot/dts/tegra-paz00.dts4
-rw-r--r--arch/arm/boot/dts/tegra-seaboard.dts4
-rw-r--r--arch/arm/boot/dts/tegra-trimslice.dts4
-rw-r--r--arch/arm/boot/dts/tegra-ventana.dts4
5 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra-harmony.dts b/arch/arm/boot/dts/tegra-harmony.dts
index 1a0b1f182944..59bf1cf6a65c 100644
--- a/arch/arm/boot/dts/tegra-harmony.dts
+++ b/arch/arm/boot/dts/tegra-harmony.dts
@@ -336,4 +336,8 @@
power-gpios = <&gpio 70 0>; /* gpio PI6 */
support-8bit;
};
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ };
};
diff --git a/arch/arm/boot/dts/tegra-paz00.dts b/arch/arm/boot/dts/tegra-paz00.dts
index 10943fb2561c..fad92f2dbff0 100644
--- a/arch/arm/boot/dts/tegra-paz00.dts
+++ b/arch/arm/boot/dts/tegra-paz00.dts
@@ -351,4 +351,8 @@
linux,default-trigger = "rfkill0";
};
};
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ };
};
diff --git a/arch/arm/boot/dts/tegra-seaboard.dts b/arch/arm/boot/dts/tegra-seaboard.dts
index ec33116f5df9..ed0a2f5bf918 100644
--- a/arch/arm/boot/dts/tegra-seaboard.dts
+++ b/arch/arm/boot/dts/tegra-seaboard.dts
@@ -415,4 +415,8 @@
0x00000000 0x00000000 0x00000000 0x00000000 >;
};
};
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ };
};
diff --git a/arch/arm/boot/dts/tegra-trimslice.dts b/arch/arm/boot/dts/tegra-trimslice.dts
index 98efd5b0d7f9..71b73aab87ff 100644
--- a/arch/arm/boot/dts/tegra-trimslice.dts
+++ b/arch/arm/boot/dts/tegra-trimslice.dts
@@ -304,4 +304,8 @@
cd-gpios = <&gpio 121 0>;
wp-gpios = <&gpio 122 0>;
};
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 168 0>; /* gpio PV0 */
+ };
};
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts
index 71eb2e50a668..bd074cfb338f 100644
--- a/arch/arm/boot/dts/tegra-ventana.dts
+++ b/arch/arm/boot/dts/tegra-ventana.dts
@@ -335,4 +335,8 @@
sdhci@c8000600 {
support-8bit;
};
+
+ usb@c5004000 {
+ nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */
+ };
};