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| author | Will Deacon <will.deacon@arm.com> | 2012-02-03 14:52:14 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2012-03-24 09:38:53 +0000 |
| commit | e0b823e9a543527dbb0f806252ee03a60f2aefbc (patch) | |
| tree | f54a12a1ff6dc4857801ab45b661fdaf735b2d52 /arch/arm/common | |
| parent | 342d00ae2b85af003f11036484a33e12e906fe92 (diff) | |
| download | linux-e0b823e9a543527dbb0f806252ee03a60f2aefbc.tar.gz linux-e0b823e9a543527dbb0f806252ee03a60f2aefbc.tar.bz2 linux-e0b823e9a543527dbb0f806252ee03a60f2aefbc.zip | |
ARM: 7318/1: gic: refactor irq_start assignment
The irq_start and hwirq_base assignment code is fairly hairy and ended
up being difficult to read following a conflict resolution for 3.2.
This patch rearranges the code slightly to make it easier to read.
Cc: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/common')
| -rw-r--r-- | arch/arm/common/gic.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/arm/common/gic.c b/arch/arm/common/gic.c index b2dc2dd7f1df..a3bc86fa3156 100644 --- a/arch/arm/common/gic.c +++ b/arch/arm/common/gic.c @@ -697,13 +697,12 @@ void __init gic_init_bases(unsigned int gic_nr, int irq_start, * For primary GICs, skip over SGIs. * For secondary GICs, skip over PPIs, too. */ - domain->hwirq_base = 32; - if (gic_nr == 0) { - if ((irq_start & 31) > 0) { - domain->hwirq_base = 16; - if (irq_start != -1) - irq_start = (irq_start & ~31) + 16; - } + if (gic_nr == 0 && (irq_start & 31) > 0) { + domain->hwirq_base = 16; + if (irq_start != -1) + irq_start = (irq_start & ~31) + 16; + } else { + domain->hwirq_base = 32; } /* |