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| author | Pawel Moll <pawel.moll@arm.com> | 2012-09-04 17:06:20 +0100 |
|---|---|---|
| committer | Pawel Moll <pawel.moll@arm.com> | 2012-10-18 17:56:16 +0100 |
| commit | 852663d94f0cc44199c31c0e42d4801302f41705 (patch) | |
| tree | ace1147a2e1da8b3a0cb724d2e97795ecdd5e8f8 /arch/arm/include | |
| parent | ddffeb8c4d0331609ef2581d84de4d763607bd37 (diff) | |
| download | linux-852663d94f0cc44199c31c0e42d4801302f41705.tar.gz linux-852663d94f0cc44199c31c0e42d4801302f41705.tar.bz2 linux-852663d94f0cc44199c31c0e42d4801302f41705.zip | |
ARM: vexpress: Make the debug UART detection more specific
Base the UART detection heuristic on architecturally defined
MIDR register instead of implementation dependent CBAR. The
only tile using the original memory map is V2P-CA9 with Cortex
A9 r0p1, which MIDR contains value 0x410fc091.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/debug/vexpress.S | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/include/debug/vexpress.S b/arch/arm/include/debug/vexpress.S index 9f509f55d078..0c6abbf4c82b 100644 --- a/arch/arm/include/debug/vexpress.S +++ b/arch/arm/include/debug/vexpress.S @@ -23,12 +23,14 @@ .macro addruart,rp,rv,tmp @ Make an educated guess regarding the memory map: - @ - the original A9 core tile, which has MPCore peripherals - @ located at 0x1e000000, should use UART at 0x10009000 + @ - the original A9 core tile (based on ARM Cortex-A9 r0p1) + @ should use UART at 0x10009000 @ - all other (RS1 complaint) tiles use UART mapped @ at 0x1c090000 - mrc p15, 4, \tmp, c15, c0, 0 - cmp \tmp, #0x1e000000 + mrc p15, 0, \rp, c0, c0, 0 + movw \rv, #0xc091 + movt \rv, #0x410f + cmp \rp, \rv @ Original memory map moveq \rp, #DEBUG_LL_UART_OFFSET |