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author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-06-25 11:44:06 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-07-02 10:56:00 +0100 |
commit | 02fe2845d6a837ab02f0738f6cf4591a02cc88d4 (patch) | |
tree | e50d06a1ab73a2735dd145edde458463b1da4a37 /arch/arm/kernel/entry-header.S | |
parent | 8b4186160b7894ca4583f702a562856d5d9e9118 (diff) | |
download | linux-02fe2845d6a837ab02f0738f6cf4591a02cc88d4.tar.gz linux-02fe2845d6a837ab02f0738f6cf4591a02cc88d4.tar.bz2 linux-02fe2845d6a837ab02f0738f6cf4591a02cc88d4.zip |
ARM: entry: avoid enabling interrupts in prefetch/data abort handlers
Avoid enabling interrupts if the parent context had interrupts enabled
in the abort handler assembly code, and move this into the breakpoint/
page/alignment fault handlers instead.
This gets rid of some special-casing for the breakpoint fault handlers
from the low level abort handler path.
Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/kernel/entry-header.S')
-rw-r--r-- | arch/arm/kernel/entry-header.S | 19 |
1 files changed, 0 insertions, 19 deletions
diff --git a/arch/arm/kernel/entry-header.S b/arch/arm/kernel/entry-header.S index 051166c2a932..4d6ad8348e89 100644 --- a/arch/arm/kernel/entry-header.S +++ b/arch/arm/kernel/entry-header.S @@ -165,25 +165,6 @@ .endm #endif /* !CONFIG_THUMB2_KERNEL */ - @ - @ Debug exceptions are taken as prefetch or data aborts. - @ We must disable preemption during the handler so that - @ we can access the debug registers safely. - @ - .macro debug_entry, fsr -#if defined(CONFIG_HAVE_HW_BREAKPOINT) && defined(CONFIG_PREEMPT) - ldr r4, =0x40f @ mask out fsr.fs - and r5, r4, \fsr - cmp r5, #2 @ debug exception - bne 1f - get_thread_info r10 - ldr r6, [r10, #TI_PREEMPT] @ get preempt count - add r11, r6, #1 @ increment it - str r11, [r10, #TI_PREEMPT] -1: -#endif - .endm - /* * These are the registers used in the syscall handler, and allow us to * have in theory up to 7 arguments to a function - r0 to r6. |