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author | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-22 09:08:39 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2015-04-22 09:08:39 -0700 |
commit | e6c81cce5699ec6be3a7533b5ad7a062ab3357f2 (patch) | |
tree | 4592735bbfb17f163217d0bb80877dcc22a869c0 /arch/arm/mach-alpine/alpine_cpu_resume.h | |
parent | d0440c59f52d31aa7f74ba8e35cc22ee96acea84 (diff) | |
parent | a018bb2ff95868ea592212b6735b35836fda268b (diff) | |
download | linux-e6c81cce5699ec6be3a7533b5ad7a062ab3357f2.tar.gz linux-e6c81cce5699ec6be3a7533b5ad7a062ab3357f2.tar.bz2 linux-e6c81cce5699ec6be3a7533b5ad7a062ab3357f2.zip |
Merge tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC platform updates from Olof Johansson:
"Our SoC branch usually contains expanded support for new SoCs and
other core platform code. In this case, that includes:
- support for the new Annapurna Labs "Alpine" platform
- a rework greatly simplifying adding new platform support to the
MCPM subsystem (Multi-cluster power management)
- cpuidle and PM improvements for Exynos3250
- misc updates for Renesas, OMAP, Meson, i.MX. Some of these could
have gone in other branches but ended up here for various reasons"
* tag 'armsoc-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits)
ARM: alpine: add support for generic pci
ARM: Exynos: migrate DCSCB to the new MCPM backend abstraction
ARM: vexpress: migrate DCSCB to the new MCPM backend abstraction
ARM: vexpress: DCSCB: tighten CPU validity assertion
ARM: vexpress: migrate TC2 to the new MCPM backend abstraction
ARM: MCPM: move the algorithmic complexity to the core code
ARM: EXYNOS: allow cpuidle driver usage on Exynos3250 SoC
ARM: EXYNOS: add AFTR mode support for Exynos3250
ARM: EXYNOS: add code for setting/clearing boot flag
ARM: EXYNOS: fix CPU1 hotplug on Exynos3250
ARM: S3C64XX: Use fixed IRQ bases to avoid conflicts on Cragganmore
ARM: cygnus: fix const declaration bcm_cygnus_dt_compat
ARM: DRA7: hwmod: Fix the hwmod class for GPTimer4
ARM: DRA7: hwmod: Add data for GPTimers 13 through 16
ARM: EXYNOS: Remove left over 'extra_save'
ARM: EXYNOS: Constify exynos_pm_data array
ARM: EXYNOS: use static in suspend.c
ARM: EXYNOS: Use platform device name as power domain name
ARM: EXYNOS: add support for async-bridge clocks for pm_domains
ARM: omap-device: add missed callback for suspend-to-disk
...
Diffstat (limited to 'arch/arm/mach-alpine/alpine_cpu_resume.h')
-rw-r--r-- | arch/arm/mach-alpine/alpine_cpu_resume.h | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-alpine/alpine_cpu_resume.h b/arch/arm/mach-alpine/alpine_cpu_resume.h new file mode 100644 index 000000000000..c80150c0d2d8 --- /dev/null +++ b/arch/arm/mach-alpine/alpine_cpu_resume.h @@ -0,0 +1,38 @@ +/* + * Annapurna labs cpu-resume register structure. + * + * Copyright (C) 2015 Annapurna Labs Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef ALPINE_CPU_RESUME_H_ +#define ALPINE_CPU_RESUME_H_ + +/* Per-cpu regs */ +struct al_cpu_resume_regs_per_cpu { + uint32_t flags; + uint32_t resume_addr; +}; + +/* general regs */ +struct al_cpu_resume_regs { + /* Watermark for validating the CPU resume struct */ + uint32_t watermark; + uint32_t flags; + struct al_cpu_resume_regs_per_cpu per_cpu[]; +}; + +/* The expected magic number for validating the resume addresses */ +#define AL_CPU_RESUME_MAGIC_NUM 0xf0e1d200 +#define AL_CPU_RESUME_MAGIC_NUM_MASK 0xffffff00 + +#endif /* ALPINE_CPU_RESUME_H_ */ |