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| author | Brian Niebuhr <bniebuhr3@gmail.com> | 2010-03-09 16:48:03 -0600 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2010-04-05 15:25:11 -0700 |
| commit | bb17ef102b72e38557bfa829511e06c4bd3bb972 (patch) | |
| tree | e35ff2208685fdd619afbb4eba8b9e5fe1a34885 /arch/arm/mach-davinci/dma.c | |
| parent | 5eb2e891f038c8e04757f4536b9693faf35978a3 (diff) | |
| download | linux-bb17ef102b72e38557bfa829511e06c4bd3bb972.tar.gz linux-bb17ef102b72e38557bfa829511e06c4bd3bb972.tar.bz2 linux-bb17ef102b72e38557bfa829511e06c4bd3bb972.zip | |
davinci: edma: clear events in edma_start()
This patch fixes an issue where a DMA channel can erroneously process an
event generated by a previous transfer. A failure case is where DMA is
being used for SPI transmit and receive channels on OMAP L138. In this
case there is a single bit that controls all event generation from the
SPI peripheral. Therefore it is possible that between when edma_stop()
has been called for the transmit channel on a previous transfer and
edma_start() is called for the transmit channel on a subsequent transfer,
that a transmit event has been generated.
The fix is to clear events in edma_start(). This prevents false events
from being processed when events are enabled for that channel.
Signed-off-by: Brian Niebuhr <bniebuhr@efjohnson.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-davinci/dma.c')
| -rw-r--r-- | arch/arm/mach-davinci/dma.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c index 15dd886df04c..260485cc76df 100644 --- a/arch/arm/mach-davinci/dma.c +++ b/arch/arm/mach-davinci/dma.c @@ -1266,7 +1266,8 @@ int edma_start(unsigned channel) /* EDMA channel with event association */ pr_debug("EDMA: ER%d %08x\n", j, edma_shadow0_read_array(ctlr, SH_ER, j)); - /* Clear any pending error */ + /* Clear any pending event or error */ + edma_write_array(ctlr, EDMA_ECR, j, mask); edma_write_array(ctlr, EDMA_EMCR, j, mask); /* Clear any SER */ edma_shadow0_write_array(ctlr, SH_SECR, j, mask); |