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author | James Morris <jmorris@namei.org> | 2008-08-28 10:47:34 +1000 |
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committer | James Morris <jmorris@namei.org> | 2008-08-28 10:47:34 +1000 |
commit | 86d688984deefa3ae5a802880c11f2b408b5d6cf (patch) | |
tree | 7ea5e8189b0a774626d3ed7c3c87df2495a4c4a0 /arch/arm/mach-ebsa110/include/mach/system.h | |
parent | 93c06cbbf9fea5d5be1778febb7fa9ab1a74e5f5 (diff) | |
parent | 4c246edd2550304df5b766cc841584b2bb058843 (diff) | |
download | linux-86d688984deefa3ae5a802880c11f2b408b5d6cf.tar.gz linux-86d688984deefa3ae5a802880c11f2b408b5d6cf.tar.bz2 linux-86d688984deefa3ae5a802880c11f2b408b5d6cf.zip |
Merge branch 'master' into next
Diffstat (limited to 'arch/arm/mach-ebsa110/include/mach/system.h')
-rw-r--r-- | arch/arm/mach-ebsa110/include/mach/system.h | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/mach-ebsa110/include/mach/system.h b/arch/arm/mach-ebsa110/include/mach/system.h new file mode 100644 index 000000000000..350a028997ef --- /dev/null +++ b/arch/arm/mach-ebsa110/include/mach/system.h @@ -0,0 +1,39 @@ +/* + * arch/arm/mach-ebsa110/include/mach/system.h + * + * Copyright (C) 1996-2000 Russell King. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __ASM_ARCH_SYSTEM_H +#define __ASM_ARCH_SYSTEM_H + +/* + * EBSA110 idling methodology: + * + * We can not execute the "wait for interrupt" instruction since that + * will stop our MCLK signal (which provides the clock for the glue + * logic, and therefore the timer interrupt). + * + * Instead, we spin, polling the IRQ_STAT register for the occurrence + * of any interrupt with core clock down to the memory clock. + */ +static inline void arch_idle(void) +{ + const char *irq_stat = (char *)0xff000000; + + /* disable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc"); + + /* wait for an interrupt to occur */ + while (!*irq_stat); + + /* enable clock switching */ + asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc"); +} + +#define arch_reset(mode) cpu_reset(0x80000000) + +#endif |