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| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-09 21:33:03 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-09 21:33:03 +0100 |
| commit | b1add0480a95b6ceaece5caf6c50614771eae9b2 (patch) | |
| tree | 06f969f37bd0f51d9ebcccdb3e3ae983edaad889 /arch/arm/mach-imx | |
| parent | 3f30a09a612bac2b531a206c2a58a292dd7ff182 (diff) | |
| parent | 58a85f465fb16a918a869eba05addb8f78d9e064 (diff) | |
| download | linux-b1add0480a95b6ceaece5caf6c50614771eae9b2.tar.gz linux-b1add0480a95b6ceaece5caf6c50614771eae9b2.tar.bz2 linux-b1add0480a95b6ceaece5caf6c50614771eae9b2.zip | |
Merge branch 'for-rmk' of git://pasiphae.extern.pengutronix.de/git/imx/linux-2.6.git
Merge branch 'imx-devel' into devel
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/include/mach/irqs.h | 5 | ||||
| -rw-r--r-- | arch/arm/mach-imx/irq.c | 32 |
2 files changed, 33 insertions, 4 deletions
diff --git a/arch/arm/mach-imx/include/mach/irqs.h b/arch/arm/mach-imx/include/mach/irqs.h index eb8d5bd05d56..67812c5ac1f9 100644 --- a/arch/arm/mach-imx/include/mach/irqs.h +++ b/arch/arm/mach-imx/include/mach/irqs.h @@ -111,6 +111,11 @@ /* decode irq number to use with IMR(x), ISR(x) and friends */ #define IRQ_TO_REG(irq) ((irq - IMX_IRQS) >> 5) +/* all normal IRQs can be FIQs */ +#define FIQ_START 0 +/* switch betwean IRQ and FIQ */ +extern int imx_set_irq_fiq(unsigned int irq, unsigned int type); + #define NR_IRQS (IRQ_GPIOD(32) + 1) #define IRQ_GPIO(x) #endif diff --git a/arch/arm/mach-imx/irq.c b/arch/arm/mach-imx/irq.c index 232e3b9f880d..531b95deadc0 100644 --- a/arch/arm/mach-imx/irq.c +++ b/arch/arm/mach-imx/irq.c @@ -36,10 +36,7 @@ /* * * We simply use the ENABLE DISABLE registers inside of the IMX - * to turn on/off specific interrupts. FIXME- We should - * also add support for the accelerated interrupt controller - * by putting offets to irq jump code in the appropriate - * places. + * to turn on/off specific interrupts. * */ @@ -102,6 +99,28 @@ imx_unmask_irq(unsigned int irq) __raw_writel(irq, IMX_AITC_INTENNUM); } +#ifdef CONFIG_FIQ +int imx_set_irq_fiq(unsigned int irq, unsigned int type) +{ + unsigned int irqt; + + if (irq >= IMX_IRQS) + return -EINVAL; + + if (irq < IMX_IRQS / 2) { + irqt = __raw_readl(IMX_AITC_INTTYPEL) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEL); + } else { + irq -= IMX_IRQS / 2; + irqt = __raw_readl(IMX_AITC_INTTYPEH) & ~(1 << irq); + __raw_writel(irqt | (!!type << irq), IMX_AITC_INTTYPEH); + } + + return 0; +} +EXPORT_SYMBOL(imx_set_irq_fiq); +#endif /* CONFIG_FIQ */ + static int imx_gpio_irq_type(unsigned int _irq, unsigned int type) { @@ -284,4 +303,9 @@ imx_init_irq(void) /* Release masking of interrupts according to priority */ __raw_writel(-1, IMX_AITC_NIMASK); + +#ifdef CONFIG_FIQ + /* Initialize FIQ */ + init_FIQ(); +#endif } |