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authorRussell King <rmk+kernel@arm.linux.org.uk>2014-03-19 12:10:16 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-05-30 00:49:32 +0100
commit42708e37a3b68da1041ac79d106945c3c90e630a (patch)
treefb12ae3736d00be9c6d75a9fe8e58d7429b1b625 /arch/arm/mach-nomadik
parent9847cf0403c7c8a054fd48f9833d408b468554b6 (diff)
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ARM: l2c: nomadik: remove cache size override
The cache size should already be present in the L2 cache auxiliary control register: it is part of the integration process to configure the hardware IP. Most platforms get this right, yet still many cargo-cult program, and assume that they always need specifying to the L2 cache code. Remove them so we can find out which really need this. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-nomadik')
-rw-r--r--arch/arm/mach-nomadik/cpu-8815.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c
index 4a1065e41e9c..0f245bcc6b7e 100644
--- a/arch/arm/mach-nomadik/cpu-8815.c
+++ b/arch/arm/mach-nomadik/cpu-8815.c
@@ -147,7 +147,7 @@ static void __init cpu8815_init_of(void)
{
#ifdef CONFIG_CACHE_L2X0
/* At full speed latency must be >=2, so 0x249 in low bits */
- l2x0_of_init(0x00730249, 0xfe000fff);
+ l2x0_of_init(0x00700249, 0xfe0fefff);
#endif
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}