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author | Jean Pihet <jpihet@mvista.com> | 2009-07-24 19:43:25 -0600 |
---|---|---|
committer | paul <paul@twilight.(none)> | 2009-07-24 19:43:25 -0600 |
commit | 58cda884ecc87dcce18d463b0c8bd928dae63ad8 (patch) | |
tree | 7bae55dfa93ba324c7478f5affa11ac66e2cab1a /arch/arm/mach-omap2/board-omap3pandora.c | |
parent | 4be3bd7849165e7efa6b0b35a23d6a3598d97465 (diff) | |
download | linux-58cda884ecc87dcce18d463b0c8bd928dae63ad8.tar.gz linux-58cda884ecc87dcce18d463b0c8bd928dae63ad8.tar.bz2 linux-58cda884ecc87dcce18d463b0c8bd928dae63ad8.zip |
OMAP3 SDRC: add support for 2 SDRAM chip selects
Some OMAP3 boards (Beagle Cx, Overo, RX51, Pandora) have 2
SDRAM parts connected to the SDRC.
This patch adds the following:
- add a new argument of type omap_sdrc_params struct*
to omap2_init_common_hw and omap2_sdrc_init for the 2nd CS params
- adapted the OMAP boards files to the new prototype of
omap2_init_common_hw
- add the SDRC 2nd CS registers offsets defines
- adapt the sram sleep code to configure the SDRC for the 2nd CS
Note: If the 2nd param to omap2_init_common_hw is NULL, then the
parameters are not programmed into the SDRC CS1 registers
Tested on 3430 SDP and Beagleboard rev C2 and B5, with
suspend/resume and frequency changes (cpufreq).
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/board-omap3pandora.c')
-rw-r--r-- | arch/arm/mach-omap2/board-omap3pandora.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c index e32aa23ce962..9b991ced3822 100644 --- a/arch/arm/mach-omap2/board-omap3pandora.c +++ b/arch/arm/mach-omap2/board-omap3pandora.c @@ -310,7 +310,8 @@ static int __init omap3pandora_i2c_init(void) static void __init omap3pandora_init_irq(void) { - omap2_init_common_hw(mt46h32m32lf6_sdrc_params); + omap2_init_common_hw(mt46h32m32lf6_sdrc_params, + mt46h32m32lf6_sdrc_params); omap_init_irq(); omap_gpio_init(); } |