diff options
author | Paul Walmsley <paul@pwsan.com> | 2012-01-30 02:47:24 -0700 |
---|---|---|
committer | Kevin Hilman <khilman@ti.com> | 2012-03-05 15:38:02 -0800 |
commit | e68e8093ed570f9272665112d13d4c5811536680 (patch) | |
tree | db72b5962b7991e0bfba2f0d182b4c13de9be23a /arch/arm/mach-omap2/pm.c | |
parent | 506c7d7931317813b3142f57d44bf113102a2a8f (diff) | |
download | linux-e68e8093ed570f9272665112d13d4c5811536680.tar.gz linux-e68e8093ed570f9272665112d13d4c5811536680.tar.bz2 linux-e68e8093ed570f9272665112d13d4c5811536680.zip |
ARM: OMAP2+: PM: clean up omap_set_pwrdm_state()
Clean up a few different parts of omap_set_pwrdm_state():
- Remove a superfluous call to pwrdm_state_switch(). Not needed
unless LOWPOWERSTATECHANGE is used, because the state switch code is
called by either clkdm_sleep() or clkdm_allow_idle().
- Add code to wait for the power state transition in the OMAP4+ low
power state change. This is speculative, so I would particularly
appreciate feedback on this part.
- Remove a superfluous call to pwrdm_read_pwrst().
- Update variable names to be more meaningful (hopefully) and precise.
- Fix an error path bug that would not place the clockdomain back into
hardware-supervised idle or sleep mode if the power state could not
be programmed.
The documentation for this function still needs major improvements;
that's left for a later patch.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
Tested-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm.c')
-rw-r--r-- | arch/arm/mach-omap2/pm.c | 39 |
1 files changed, 17 insertions, 22 deletions
diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c index fb9b85bfc308..c3fe8eada2cc 100644 --- a/arch/arm/mach-omap2/pm.c +++ b/arch/arm/mach-omap2/pm.c @@ -72,28 +72,27 @@ static void omap2_init_processor_devices(void) * This sets pwrdm state (other than mpu & core. Currently only ON & * RET are supported. */ -int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) +int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst) { - u32 cur_state; - int sleep_switch = -1; - int ret = 0; - int hwsup = 0; + u8 curr_pwrst, next_pwrst; + int sleep_switch = -1, ret = 0, hwsup = 0; - if (pwrdm == NULL || IS_ERR(pwrdm)) + if (!pwrdm || IS_ERR(pwrdm)) return -EINVAL; - while (!(pwrdm->pwrsts & (1 << state))) { - if (state == PWRDM_POWER_OFF) + while (!(pwrdm->pwrsts & (1 << pwrst))) { + if (pwrst == PWRDM_POWER_OFF) return ret; - state--; + pwrst--; } - cur_state = pwrdm_read_next_pwrst(pwrdm); - if (cur_state == state) + next_pwrst = pwrdm_read_next_pwrst(pwrdm); + if (next_pwrst == pwrst) return ret; - if (pwrdm_read_pwrst(pwrdm) < PWRDM_POWER_ON) { - if ((pwrdm_read_pwrst(pwrdm) > state) && + curr_pwrst = pwrdm_read_pwrst(pwrdm); + if (curr_pwrst < PWRDM_POWER_ON) { + if ((curr_pwrst > pwrst) && (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { sleep_switch = LOWPOWERSTATE_SWITCH; } else { @@ -103,12 +102,10 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) } } - ret = pwrdm_set_next_pwrst(pwrdm, state); - if (ret) { - pr_err("%s: unable to set state of powerdomain: %s\n", + ret = pwrdm_set_next_pwrst(pwrdm, pwrst); + if (ret) + pr_err("%s: unable to set power state of powerdomain: %s\n", __func__, pwrdm->name); - goto err; - } switch (sleep_switch) { case FORCEWAKEUP_SWITCH: @@ -119,13 +116,11 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) break; case LOWPOWERSTATE_SWITCH: pwrdm_set_lowpwrstchange(pwrdm); + pwrdm_wait_transition(pwrdm); + pwrdm_state_switch(pwrdm); break; - default: - return ret; } - pwrdm_state_switch(pwrdm); -err: return ret; } |