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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-29 15:18:06 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-04-29 15:18:06 -0700 |
commit | d973664992d814d93db161b28c0cc9a4c7e68f42 (patch) | |
tree | 03de3a9ef1f8f0d5dcd2e3c217c4fdf334f6691e /arch/arm/mach-orion5x | |
parent | 2d5e3e8d28a7820de1eb7b18a7c15d645bb26992 (diff) | |
parent | 9d87dd97ffcd3b5eb2bbaf0d5d93f4bfcaed3f04 (diff) | |
download | linux-d973664992d814d93db161b28c0cc9a4c7e68f42.tar.gz linux-d973664992d814d93db161b28c0cc9a4c7e68f42.tar.bz2 linux-d973664992d814d93db161b28c0cc9a4c7e68f42.zip |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (26 commits)
[ARM] pxa: fix 1c104e0e4f6ab396960c058e95e18bdedcac945b
[ARM] serial: s3c2410: platform_get_irq() may return signed unnoticed
[ARM] am79c961a: platform_get_irq() may return signed unnoticed
[ARM] Feroceon: Feroceon-specific WA-cache compatible {copy,clear}_user_page()
[ARM] Feroceon: fix function alignment in proc-feroceon.S
[ARM] Orion: catch a couple more alternative spellings of PCIe
[ARM] Orion: fix orion-ehci platform resource end addresses
[ARM] Orion: fix ->map_irq() PCIe bus number check
[ARM] Orion: fix ioremap() optimization
[ARM] feroceon: remove CONFIG_CPU_CACHE_ROUND_ROBIN check
[ARM] feroceon: remove CONFIG_CPU_DCACHE_WRITETHROUGH check
kprobes/arm: fix decoding of arithmetic immediate instructions
kprobes/arm: fix cache flush address for instruction stub
[ARM] 5022/1: Race in ARM MMCI PL18x driver, V2
[ARM] 5021/1: at91: buildfix for sam9263 + PM
[ARM] 5018/1: RealView: Fix the ARM11MPCore Oprofile compilation
[ARM] 5016/1: AT91: typo in mci configuration for at91cap at91sam9263
[ARM] 5017/1: pxa3xx: Report unsupported wakeup sources in pxa3xx_set_wake()
[ARM] 5020/1: magician: remove __devinit marker from pasic3_leds_info
[ARM] 5014/1: Cleanup reset state before entering suspend or resetting.
...
Diffstat (limited to 'arch/arm/mach-orion5x')
-rw-r--r-- | arch/arm/mach-orion5x/addr-map.c | 4 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/common.c | 6 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/common.h | 3 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/db88f5281-setup.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/dns323-setup.c | 17 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/kurobox_pro-setup.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/pci.c | 20 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/rd88f5182-setup.c | 11 | ||||
-rw-r--r-- | arch/arm/mach-orion5x/ts209-setup.c | 13 |
9 files changed, 64 insertions, 37 deletions
diff --git a/arch/arm/mach-orion5x/addr-map.c b/arch/arm/mach-orion5x/addr-map.c index 6b179371e0a2..9608503d67f5 100644 --- a/arch/arm/mach-orion5x/addr-map.c +++ b/arch/arm/mach-orion5x/addr-map.c @@ -19,14 +19,14 @@ /* * The Orion has fully programable address map. There's a separate address - * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIE, USB, + * map for each of the device _master_ interfaces, e.g. CPU, PCI, PCIe, USB, * Gigabit Ethernet, DMA/XOR engines, etc. Each interface has its own * address decode windows that allow it to access any of the Orion resources. * * CPU address decoding -- * Linux assumes that it is the boot loader that already setup the access to * DDR and internal registers. - * Setup access to PCI and PCI-E IO/MEM space is issued by this file. + * Setup access to PCI and PCIe IO/MEM space is issued by this file. * Setup access to various devices located on the device bus interface (e.g. * flashes, RTC, etc) should be issued by machine-setup.c according to * specific board population (by using orion5x_setup_*_win()). diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c index 439c7784af02..968deb58be01 100644 --- a/arch/arm/mach-orion5x/common.c +++ b/arch/arm/mach-orion5x/common.c @@ -132,7 +132,7 @@ static struct platform_device orion5x_uart = { static struct resource orion5x_ehci0_resources[] = { { .start = ORION5X_USB0_PHYS_BASE, - .end = ORION5X_USB0_PHYS_BASE + SZ_4K, + .end = ORION5X_USB0_PHYS_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { @@ -145,7 +145,7 @@ static struct resource orion5x_ehci0_resources[] = { static struct resource orion5x_ehci1_resources[] = { { .start = ORION5X_USB1_PHYS_BASE, - .end = ORION5X_USB1_PHYS_BASE + SZ_4K, + .end = ORION5X_USB1_PHYS_BASE + SZ_4K - 1, .flags = IORESOURCE_MEM, }, { @@ -317,7 +317,7 @@ struct sys_timer orion5x_timer = { ****************************************************************************/ /* - * Identify device ID and rev from PCIE configuration header space '0'. + * Identify device ID and rev from PCIe configuration header space '0'. */ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name) { diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h index f4c4c9a72a7c..14adf8d1a54a 100644 --- a/arch/arm/mach-orion5x/common.h +++ b/arch/arm/mach-orion5x/common.h @@ -33,10 +33,9 @@ struct pci_sys_data; struct pci_bus; void orion5x_pcie_id(u32 *dev, u32 *rev); -int orion5x_pcie_local_bus_nr(void); -int orion5x_pci_local_bus_nr(void); int orion5x_pci_sys_setup(int nr, struct pci_sys_data *sys); struct pci_bus *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys); +int orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin); /* * Valid GPIO pins according to MPP setup, used by machine-setup. diff --git a/arch/arm/mach-orion5x/db88f5281-setup.c b/arch/arm/mach-orion5x/db88f5281-setup.c index ea3141e3e3c0..44c64342dacb 100644 --- a/arch/arm/mach-orion5x/db88f5281-setup.c +++ b/arch/arm/mach-orion5x/db88f5281-setup.c @@ -241,14 +241,17 @@ void __init db88f5281_pci_preinit(void) static int __init db88f5281_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { + int irq; + /* - * PCIE IRQ is connected internally (not GPIO) + * Check for devices with hard-wired IRQs. */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; /* - * PCI IRQs are connected via GPIOs + * PCI IRQs are connected via GPIOs. */ switch (slot - DB88F5281_PCI_SLOT0_OFFS) { case 0: diff --git a/arch/arm/mach-orion5x/dns323-setup.c b/arch/arm/mach-orion5x/dns323-setup.c index 058a525c2ab6..f9430f5ca9a8 100644 --- a/arch/arm/mach-orion5x/dns323-setup.c +++ b/arch/arm/mach-orion5x/dns323-setup.c @@ -43,11 +43,16 @@ static int __init dns323_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { - /* PCI-E */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; + int irq; - pr_err("%s: requested mapping for unknown bus\n", __func__); + /* + * Check for devices with hard-wired IRQs. + */ + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; + + pr_err("%s: requested mapping for unknown device\n", __func__); return -1; } @@ -250,9 +255,9 @@ static void __init dns323_init(void) */ orion5x_setup_dev_boot_win(DNS323_NOR_BOOT_BASE, DNS323_NOR_BOOT_SIZE); - /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIE + /* DNS-323 has a Marvell 88X7042 SATA controller attached via PCIe * - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c index 707db4be74a6..88410862feef 100644 --- a/arch/arm/mach-orion5x/kurobox_pro-setup.c +++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c @@ -120,13 +120,19 @@ static struct platform_device kurobox_pro_nor_flash = { static int __init kurobox_pro_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { + int irq; + + /* + * Check for devices with hard-wired IRQs. + */ + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; + /* * PCI isn't used on the Kuro */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; - else - printk(KERN_ERR "kurobox_pro_pci_map_irq failed, unknown bus\n"); + printk(KERN_ERR "kurobox_pro_pci_map_irq failed, unknown bus\n"); return -1; } @@ -191,7 +197,7 @@ static void __init kurobox_pro_init(void) orion5x_setup_dev0_win(KUROBOX_PRO_NAND_BASE, KUROBOX_PRO_NAND_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/pci.c b/arch/arm/mach-orion5x/pci.c index fdf99fca85b3..9d5d39fa19c3 100644 --- a/arch/arm/mach-orion5x/pci.c +++ b/arch/arm/mach-orion5x/pci.c @@ -41,11 +41,6 @@ void __init orion5x_pcie_id(u32 *dev, u32 *rev) *rev = orion_pcie_rev(PCIE_BASE); } -int __init orion5x_pcie_local_bus_nr(void) -{ - return orion_pcie_get_local_bus_nr(PCIE_BASE); -} - static int pcie_valid_config(int bus, int dev) { /* @@ -269,7 +264,7 @@ static int __init pcie_setup(struct pci_sys_data *sys) */ static DEFINE_SPINLOCK(orion5x_pci_lock); -int orion5x_pci_local_bus_nr(void) +static int orion5x_pci_local_bus_nr(void) { u32 conf = orion5x_read(PCI_P2P_CONF); return((conf & PCI_P2P_BUS_MASK) >> PCI_P2P_BUS_OFFS); @@ -557,3 +552,16 @@ struct pci_bus __init *orion5x_pci_sys_scan_bus(int nr, struct pci_sys_data *sys return bus; } + +int __init orion5x_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) +{ + int bus = dev->bus->number; + + /* + * PCIe endpoint? + */ + if (bus < orion5x_pci_local_bus_nr()) + return IRQ_ORION5X_PCIE0_INT; + + return -1; +} diff --git a/arch/arm/mach-orion5x/rd88f5182-setup.c b/arch/arm/mach-orion5x/rd88f5182-setup.c index 7082fe8f83b1..81abc1003aae 100644 --- a/arch/arm/mach-orion5x/rd88f5182-setup.c +++ b/arch/arm/mach-orion5x/rd88f5182-setup.c @@ -172,11 +172,14 @@ void __init rd88f5182_pci_preinit(void) static int __init rd88f5182_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { + int irq; + /* - * PCI-E isn't used on the RD2 + * Check for devices with hard-wired IRQs. */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; /* * PCI IRQs are connected via GPIOs @@ -257,7 +260,7 @@ static void __init rd88f5182_init(void) orion5x_setup_dev1_win(RD88F5182_NOR_BASE, RD88F5182_NOR_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); diff --git a/arch/arm/mach-orion5x/ts209-setup.c b/arch/arm/mach-orion5x/ts209-setup.c index 6f93668b0ed5..9afb41ee6e07 100644 --- a/arch/arm/mach-orion5x/ts209-setup.c +++ b/arch/arm/mach-orion5x/ts209-setup.c @@ -141,14 +141,17 @@ void __init qnap_ts209_pci_preinit(void) static int __init qnap_ts209_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin) { + int irq; + /* - * PCIE IRQ is connected internally (not GPIO) + * Check for devices with hard-wired IRQs. */ - if (dev->bus->number == orion5x_pcie_local_bus_nr()) - return IRQ_ORION5X_PCIE0_INT; + irq = orion5x_pci_map_irq(dev, slot, pin); + if (irq != -1) + return irq; /* - * PCI IRQs are connected via GPIOs + * PCI IRQs are connected via GPIOs. */ switch (slot - QNAP_TS209_PCI_SLOT0_OFFS) { case 0: @@ -372,7 +375,7 @@ static void __init qnap_ts209_init(void) QNAP_TS209_NOR_BOOT_SIZE); /* - * Open a special address decode windows for the PCIE WA. + * Open a special address decode windows for the PCIe WA. */ orion5x_setup_pcie_wa_win(ORION5X_PCIE_WA_PHYS_BASE, ORION5X_PCIE_WA_SIZE); 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