Merge tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull non-critical ARM SoC bug fixes from Arnd Bergmann:
 "Bug fixes that did not make it into v3.8, mostly because they were not
  considered important enough, and in some cases because bugs only show
  up in combination with other patches destined for 3.9.  This includes
  a few larger patches for GPIO on the Marvell PXA platform and a lot of
  Samsung specific bug fixes, as well as a series from Arnd to fix older
  build warnings."

* tag 'fixes-non-critical' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (54 commits)
  ARM: SPEAr13xx: Enable CONFIG_ARCH_HAS_CPUFREQ
  ARM: imx: MACH_MX31ADS_WM1133_EV1 needs REGULATOR_WM8350
  scripts/sortextable: silence script output
  ARM: s3c: i2c: add platform_device forward declaration
  ARM: mvebu: allow selecting mvebu without Armada XP
  ARM: pick Versatile by default for !MMU
  ARM: integrator: fix build with INTEGRATOR_AP off
  ARM: integrator/versatile: fix NOMMU warnings
  ARM: sa1100: don't warn about mach/ide.h
  ARM: shmobile: fix defconfig warning on CONFIG_USB
  ARM: w90x900: fix legacy assembly syntax
  ARM: samsung: fix assembly syntax for new gas
  ARM: disable virt_to_bus/virt_to_bus almost everywhere
  ARM: dts: Correct pin configuration of SD 4 for exynos4x12-pinctrl
  ARM: SAMSUNG: Silence empty switch warning in fimc-core.h
  ARM: SAMSUNG: Silence empty switch warning in sdhci.h
  ARM: msm: proc_comm_boot_wait should not be __init
  arm: vt8500: Update MAINTAINERS entry for arch-vt8500
  ARM: integrator: ensure ap_syscon_base is initialised when !CONFIG_MMU
  ARM: S5PV210: Fix early uart output in fifo mode
  ...

1 files changed, 14 insertions, 1 deletions

diff --git a/arch/arm/mach-pxa/smemc.c b/arch/arm/mach-pxa/smemc.c
index 79923058d10f..f38aa890b2c9 100644
--- a/arch/arm/mach-pxa/smemc.c
+++ b/arch/arm/mach-pxa/smemc.c
@@ -40,6 +40,8 @@ static void pxa3xx_smemc_resume(void)
 	__raw_writel(csadrcfg[1], CSADRCFG1);
 	__raw_writel(csadrcfg[2], CSADRCFG2);
 	__raw_writel(csadrcfg[3], CSADRCFG3);
+	/* CSMSADRCFG wakes up in its default state (0), so we need to set it */
+	__raw_writel(0x2, CSMSADRCFG);
 }
 
 static struct syscore_ops smemc_syscore_ops = {
@@ -49,8 +51,19 @@ static struct syscore_ops smemc_syscore_ops = {
 
 static int __init smemc_init(void)
 {
-	if (cpu_is_pxa3xx())
+	if (cpu_is_pxa3xx()) {
+		/*
+		 * The only documentation we have on the
+		 * Chip Select Configuration Register (CSMSADRCFG) is that
+		 * it must be programmed to 0x2.
+		 * Moreover, in the bit definitions, the second bit
+		 * (CSMSADRCFG[1]) is called "SETALWAYS".
+		 * Other bits are reserved in this register.
+		 */
+		__raw_writel(0x2, CSMSADRCFG);
+
 		register_syscore_ops(&smemc_syscore_ops);
+	}
 
 	return 0;
 }