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| author | Catalin Marinas <catalin.marinas@arm.com> | 2008-02-04 17:41:01 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-02-04 17:52:25 +0000 |
| commit | c4057f5260650f165054bc56e16acc4aa0510d4f (patch) | |
| tree | 8f1bf4de169c49fc61dd6dc0717b1d184c067d39 /arch/arm/mach-realview/realview_eb.c | |
| parent | 7dd19e755dbe481ae42590dbd921dfd47e94779c (diff) | |
| download | linux-c4057f5260650f165054bc56e16acc4aa0510d4f.tar.gz linux-c4057f5260650f165054bc56e16acc4aa0510d4f.tar.bz2 linux-c4057f5260650f165054bc56e16acc4aa0510d4f.zip | |
[ARM] 4819/1: RealView: Fix entry-macro.S to work with multiple platforms
This patch modifies the get_irqnr_preamble macro to work with multiple
platforms at run-time by reading the address of the GIC controller from
the gic_cpu_base_addr variable. This variable is defined in core.c and
intialised in realview_eb.c (gic_init_irq).
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-realview/realview_eb.c')
| -rw-r--r-- | arch/arm/mach-realview/realview_eb.c | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c index e42ac56e4db5..f36af1335024 100644 --- a/arch/arm/mach-realview/realview_eb.c +++ b/arch/arm/mach-realview/realview_eb.c @@ -256,8 +256,9 @@ static void __init gic_init_irq(void) writel(0x00000000, __io_address(REALVIEW_SYS_LOCK)); /* core tile GIC, primary */ + gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE); gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29); - gic_cpu_init(0, __io_address(REALVIEW_EB11MP_GIC_CPU_BASE)); + gic_cpu_init(0, gic_cpu_base_addr); #ifndef CONFIG_REALVIEW_MPCORE_REVB /* board GIC, secondary */ @@ -267,8 +268,9 @@ static void __init gic_init_irq(void) #endif } else { /* board GIC, primary */ + gic_cpu_base_addr = __io_address(REALVIEW_GIC_CPU_BASE); gic_dist_init(0, __io_address(REALVIEW_GIC_DIST_BASE), 29); - gic_cpu_init(0, __io_address(REALVIEW_GIC_CPU_BASE)); + gic_cpu_init(0, gic_cpu_base_addr); } } |