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| author | Ben Dooks <ben-linux@fluff.org> | 2010-01-26 10:45:40 +0900 |
|---|---|---|
| committer | Ben Dooks <ben-linux@fluff.org> | 2010-02-20 22:31:17 +0000 |
| commit | 3501c9ae9fc5414d09c9a8d3a5452d2b167db916 (patch) | |
| tree | 200146af3989c0c07b0a66bff96ac959602d1b1e /arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h | |
| parent | 2f6c2ac1d945ffc2e343103bdcfccbdb2e2de805 (diff) | |
| download | linux-3501c9ae9fc5414d09c9a8d3a5452d2b167db916.tar.gz linux-3501c9ae9fc5414d09c9a8d3a5452d2b167db916.tar.bz2 linux-3501c9ae9fc5414d09c9a8d3a5452d2b167db916.zip | |
ARM: S3C64XX: Move headers into machine include directory
Move the register and GPIO definition files from plat-s3c64xx into the
machine include direcotry as they are unlikely to be reused outside
mach-s3c64xx.
This move includes removing the empty <mach/regs-clock.h> and replacing
it with the <plat/regs-clock.h> implementation.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h')
| -rw-r--r-- | arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h new file mode 100644 index 000000000000..82342f6fd27d --- /dev/null +++ b/arch/arm/mach-s3c64xx/include/mach/regs-gpio-memport.h @@ -0,0 +1,25 @@ +/* linux/arch/arm/plat-s3c64xx/include/mach/regs-gpio-memport.h + * + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * S3C64XX - GPIO memory port register definitions + */ + +#ifndef __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H +#define __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H __FILE__ + +#define S3C64XX_MEM0CONSTOP S3C64XX_GPIOREG(0x1B0) +#define S3C64XX_MEM1CONSTOP S3C64XX_GPIOREG(0x1B4) + +#define S3C64XX_MEM0CONSLP0 S3C64XX_GPIOREG(0x1C0) +#define S3C64XX_MEM0CONSLP1 S3C64XX_GPIOREG(0x1C4) +#define S3C64XX_MEM1CONSLP S3C64XX_GPIOREG(0x1C8) + +#define S3C64XX_MEM0DRVCON S3C64XX_GPIOREG(0x1D0) +#define S3C64XX_MEM1DRVCON S3C64XX_GPIOREG(0x1D4) + +#endif /* __ASM_PLAT_S3C64XX_REGS_GPIO_MEMPORT_H */ + |