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authorMark Brown <broonie@opensource.wolfsonmicro.com>2011-11-03 16:28:15 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-11-08 19:56:03 +0900
commitaaed44e1672c61b28dcae6e3d7bd5d15aef362f3 (patch)
tree6dc2c56729227cc9abbc685e91284d2b11ee150f /arch/arm/mach-s3c64xx/include
parent4ff13995b512cfadef44e0bf5cb15298d6094519 (diff)
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ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
The gpio_base for the PMIC on the CPU module was being incorrectly set to be the same as that for the CODEC causing the two GPIO drivers to collide. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-s3c64xx/include')
-rw-r--r--arch/arm/mach-s3c64xx/include/mach/crag6410.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-s3c64xx/include/mach/crag6410.h b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
index be9074e17dfd..1cc1cc82e754 100644
--- a/arch/arm/mach-s3c64xx/include/mach/crag6410.h
+++ b/arch/arm/mach-s3c64xx/include/mach/crag6410.h
@@ -17,7 +17,8 @@
#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
#define PCA935X_GPIO_BASE GPIO_BOARD_START
-#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
+#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
+#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
#endif