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author | John Linn <john.linn@xilinx.com> | 2011-06-20 11:47:27 -0600 |
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committer | John Linn <john.linn@xilinx.com> | 2011-06-20 11:52:30 -0600 |
commit | b85a3ef4ac65169b65fd2fe9bec7912bbf475ba4 (patch) | |
tree | 4a629040873bf9f0c34c8e7c970617dcce9b30e9 /arch/arm/mach-zynq/include/mach/clkdev.h | |
parent | 2c53b436a30867eb6b47dd7bab23ba638d1fb0d2 (diff) | |
download | linux-b85a3ef4ac65169b65fd2fe9bec7912bbf475ba4.tar.gz linux-b85a3ef4ac65169b65fd2fe9bec7912bbf475ba4.tar.bz2 linux-b85a3ef4ac65169b65fd2fe9bec7912bbf475ba4.zip |
ARM: Xilinx: Adding Xilinx board support
The 1st board support is minimal to get a system up and running
on the Xilinx platform.
This platform reuses the clock implementation from plat-versatile, and
it depends entirely on CONFIG_OF support. There is only one board
support file which obtains all device information from a device tree
dtb file which is passed to the kernel at boot time.
Signed-off-by: John Linn <john.linn@xilinx.com>
Diffstat (limited to 'arch/arm/mach-zynq/include/mach/clkdev.h')
-rw-r--r-- | arch/arm/mach-zynq/include/mach/clkdev.h | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/arch/arm/mach-zynq/include/mach/clkdev.h b/arch/arm/mach-zynq/include/mach/clkdev.h new file mode 100644 index 000000000000..c6e73d81a459 --- /dev/null +++ b/arch/arm/mach-zynq/include/mach/clkdev.h @@ -0,0 +1,32 @@ +/* + * arch/arm/mach-zynq/include/mach/clkdev.h + * + * Copyright (C) 2011 Xilinx, Inc. + * + * This software is licensed under the terms of the GNU General Public + * License version 2, as published by the Free Software Foundation, and + * may be copied, distributed, and modified under those terms. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#ifndef __MACH_CLKDEV_H__ +#define __MACH_CLKDEV_H__ + +#include <plat/clock.h> + +struct clk { + unsigned long rate; + const struct clk_ops *ops; + const struct icst_params *params; + void __iomem *vcoreg; +}; + +#define __clk_get(clk) ({ 1; }) +#define __clk_put(clk) do { } while (0) + +#endif |