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authorArnd Bergmann <arnd@arndb.de>2012-01-09 16:06:31 +0000
committerArnd Bergmann <arnd@arndb.de>2012-01-09 16:06:31 +0000
commitb48741cce3be32a48af9a2b272f3f13a077375cf (patch)
treee4bc91713e02fa6d8f08b07de53ea8f905593dfa /arch/arm/mm/proc-sa1100.S
parent54b6c82ac9a124804816f244f587c0f40d25ad01 (diff)
parenta07613a54d700a974f3a4a657da78ef5d097315d (diff)
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Merge branch 'samsung/cleanup' into next/cleanup2
Diffstat (limited to 'arch/arm/mm/proc-sa1100.S')
-rw-r--r--arch/arm/mm/proc-sa1100.S3
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S
index 7d91545d089b..3aa0da11fd84 100644
--- a/arch/arm/mm/proc-sa1100.S
+++ b/arch/arm/mm/proc-sa1100.S
@@ -70,6 +70,7 @@ ENTRY(cpu_sa1100_proc_fin)
* loc: location to jump to for soft reset
*/
.align 5
+ .pushsection .idmap.text, "ax"
ENTRY(cpu_sa1100_reset)
mov ip, #0
mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
@@ -82,6 +83,8 @@ ENTRY(cpu_sa1100_reset)
bic ip, ip, #0x1100 @ ...i...s........
mcr p15, 0, ip, c1, c0, 0 @ ctrl register
mov pc, r0
+ENDPROC(cpu_sa1100_reset)
+ .popsection
/*
* cpu_sa1100_do_idle(type)