diff options
author | Olof Johansson <olof@lixom.net> | 2013-08-11 15:33:54 -0700 |
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committer | Olof Johansson <olof@lixom.net> | 2013-08-11 15:33:54 -0700 |
commit | 4ddbed9618724d52a7a79c1e10ef5adb46fcccf7 (patch) | |
tree | ffe64efb333d7dcdb5b2cf43ffef97b25261702c /arch/arm/mm | |
parent | 16649596d701c0f4f767bbcad7da4d6343ba8a9e (diff) | |
parent | fa8c5a811e0e7c3e1c49b2e58fcb4db549b5719a (diff) | |
download | linux-4ddbed9618724d52a7a79c1e10ef5adb46fcccf7.tar.gz linux-4ddbed9618724d52a7a79c1e10ef5adb46fcccf7.tar.bz2 linux-4ddbed9618724d52a7a79c1e10ef5adb46fcccf7.zip |
Merge tag 'boards-3.12' of git://git.infradead.org/linux-mvebu into next/boards
From Jason Cooper:
mvebu boards changes for v3.12
- convert kirkwood, dove, orion5x to DT init of mv643xx_eth
- _lots_ of board code removal :)
- convert kirkwood, dove and orion5x to DT init of clocksource and irqchip
* tag 'boards-3.12' of git://git.infradead.org/linux-mvebu:
ARM: plat-orion: add reg offset to DT irq driver stub
ARM: kirkwood: remove obsolete SDIO clock gate workaround
ARM: kirkwood: convert to DT irqchip and clocksource
ARM: dove: convert to DT irqchip and clocksource
ARM: orion5x: update intc device tree node to new reg layout
ARM: kirkwood: move device tree nodes to DT irqchip and clocksource
ARM: dove: move device tree nodes to DT irqchip and clocksource
ARM: orion5x: remove legacy mv643xx_eth board setup
ARM: kirkwood: remove legacy clk alias for mv643xx_eth
ARM: kirkwood: remove redundant DT board files
ARM: dove: remove legacy mv643xx_eth setup
ARM: orion5x: add gigabit ethernet and mvmdio device tree nodes
ARM: kirkwood: add gigabit ethernet and mvmdio device tree nodes
ARM: dove: add gigabit ethernet and mvmdio device tree nodes
+ Linux 3.11-rc2
Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm/mm')
-rw-r--r-- | arch/arm/mm/proc-arm1020.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1020e.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1022.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm1026.S | 3 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm720.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm740.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm7tdmi.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm920.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm922.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm925.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm926.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm940.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm946.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-arm9tdmi.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-fa526.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-feroceon.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-mohawk.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-sa110.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-sa1100.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-v6.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7-2level.S | 4 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7-3level.S | 4 | ||||
-rw-r--r-- | arch/arm/mm/proc-v7.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-xsc3.S | 2 | ||||
-rw-r--r-- | arch/arm/mm/proc-xscale.S | 2 |
25 files changed, 0 insertions, 55 deletions
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index 2bb61e703d6c..d1a2d05971e0 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S @@ -443,8 +443,6 @@ ENTRY(cpu_arm1020_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT - .type __arm1020_setup, #function __arm1020_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 8f96aa40f510..9d89405c3d03 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S @@ -425,8 +425,6 @@ ENTRY(cpu_arm1020e_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT - .type __arm1020e_setup, #function __arm1020e_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 8ebe4a469a22..6f01a0ae3b30 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S @@ -407,8 +407,6 @@ ENTRY(cpu_arm1022_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT - .type __arm1022_setup, #function __arm1022_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 093fc7e520c3..4799a24b43e6 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S @@ -396,9 +396,6 @@ ENTRY(cpu_arm1026_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - - __CPUINIT - .type __arm1026_setup, #function __arm1026_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm720.S b/arch/arm/mm/proc-arm720.S index 0ac908c7ade1..d42c37f9f5bc 100644 --- a/arch/arm/mm/proc-arm720.S +++ b/arch/arm/mm/proc-arm720.S @@ -116,8 +116,6 @@ ENTRY(cpu_arm720_reset) ENDPROC(cpu_arm720_reset) .popsection - __CPUINIT - .type __arm710_setup, #function __arm710_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm740.S b/arch/arm/mm/proc-arm740.S index fde2d2a794cf..9b0ae90cbf17 100644 --- a/arch/arm/mm/proc-arm740.S +++ b/arch/arm/mm/proc-arm740.S @@ -60,8 +60,6 @@ ENTRY(cpu_arm740_reset) ENDPROC(cpu_arm740_reset) .popsection - __CPUINIT - .type __arm740_setup, #function __arm740_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm7tdmi.S b/arch/arm/mm/proc-arm7tdmi.S index 6ddea3e464bd..f6cc3f63ce39 100644 --- a/arch/arm/mm/proc-arm7tdmi.S +++ b/arch/arm/mm/proc-arm7tdmi.S @@ -51,8 +51,6 @@ ENTRY(cpu_arm7tdmi_reset) ENDPROC(cpu_arm7tdmi_reset) .popsection - __CPUINIT - .type __arm7tdmi_setup, #function __arm7tdmi_setup: mov pc, lr diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 2556cf1c2da1..549557df6d57 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S @@ -410,8 +410,6 @@ ENTRY(cpu_arm920_do_resume) ENDPROC(cpu_arm920_do_resume) #endif - __CPUINIT - .type __arm920_setup, #function __arm920_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 4464c49d7449..2a758b06c6f6 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S @@ -388,8 +388,6 @@ ENTRY(cpu_arm922_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT - .type __arm922_setup, #function __arm922_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index 281eb9b9c1d6..97448c3acf38 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S @@ -438,8 +438,6 @@ ENTRY(cpu_arm925_set_pte_ext) #endif /* CONFIG_MMU */ mov pc, lr - __CPUINIT - .type __arm925_setup, #function __arm925_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 344c8a548cc0..0f098f407c9f 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S @@ -425,8 +425,6 @@ ENTRY(cpu_arm926_do_resume) ENDPROC(cpu_arm926_do_resume) #endif - __CPUINIT - .type __arm926_setup, #function __arm926_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 8da189d4a402..1c39a704ff6e 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S @@ -273,8 +273,6 @@ ENDPROC(arm940_dma_unmap_area) @ define struct cpu_cache_fns (see <asm/cacheflush.h> and proc-macros.S) define_cache_functions arm940 - __CPUINIT - .type __arm940_setup, #function __arm940_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index f666cf34075a..0289cd905e73 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S @@ -326,8 +326,6 @@ ENTRY(cpu_arm946_dcache_clean_area) mcr p15, 0, r0, c7, c10, 4 @ drain WB mov pc, lr - __CPUINIT - .type __arm946_setup, #function __arm946_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-arm9tdmi.S b/arch/arm/mm/proc-arm9tdmi.S index 8881391dfb9e..f51197ba754a 100644 --- a/arch/arm/mm/proc-arm9tdmi.S +++ b/arch/arm/mm/proc-arm9tdmi.S @@ -51,8 +51,6 @@ ENTRY(cpu_arm9tdmi_reset) ENDPROC(cpu_arm9tdmi_reset) .popsection - __CPUINIT - .type __arm9tdmi_setup, #function __arm9tdmi_setup: mov pc, lr diff --git a/arch/arm/mm/proc-fa526.S b/arch/arm/mm/proc-fa526.S index aaeb6c127c7a..2dfc0f1d3bfd 100644 --- a/arch/arm/mm/proc-fa526.S +++ b/arch/arm/mm/proc-fa526.S @@ -135,8 +135,6 @@ ENTRY(cpu_fa526_set_pte_ext) #endif mov pc, lr - __CPUINIT - .type __fa526_setup, #function __fa526_setup: /* On return of this routine, r0 must carry correct flags for CFG register */ diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index 4106b09e0c29..d5146b98c8d1 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S @@ -514,8 +514,6 @@ ENTRY(cpu_feroceon_set_pte_ext) #endif mov pc, lr - __CPUINIT - .type __feroceon_setup, #function __feroceon_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index 0b60dd3d742a..40acba595731 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S @@ -383,8 +383,6 @@ ENTRY(cpu_mohawk_do_resume) ENDPROC(cpu_mohawk_do_resume) #endif - __CPUINIT - .type __mohawk_setup, #function __mohawk_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-sa110.S b/arch/arm/mm/proc-sa110.S index 775d70fba937..c45319c8f1d9 100644 --- a/arch/arm/mm/proc-sa110.S +++ b/arch/arm/mm/proc-sa110.S @@ -159,8 +159,6 @@ ENTRY(cpu_sa110_set_pte_ext) #endif mov pc, lr - __CPUINIT - .type __sa110_setup, #function __sa110_setup: mov r10, #0 diff --git a/arch/arm/mm/proc-sa1100.S b/arch/arm/mm/proc-sa1100.S index d92dfd081429..09d241ae2dbe 100644 --- a/arch/arm/mm/proc-sa1100.S +++ b/arch/arm/mm/proc-sa1100.S @@ -198,8 +198,6 @@ ENTRY(cpu_sa1100_do_resume) ENDPROC(cpu_sa1100_do_resume) #endif - __CPUINIT - .type __sa1100_setup, #function __sa1100_setup: mov r0, #0 diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 2d1ef87328a1..1128064fddcb 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S @@ -180,8 +180,6 @@ ENDPROC(cpu_v6_do_resume) .align - __CPUINIT - /* * __v6_setup * diff --git a/arch/arm/mm/proc-v7-2level.S b/arch/arm/mm/proc-v7-2level.S index 9704097c450e..f64afb9f1bd5 100644 --- a/arch/arm/mm/proc-v7-2level.S +++ b/arch/arm/mm/proc-v7-2level.S @@ -160,8 +160,6 @@ ENDPROC(cpu_v7_set_pte_ext) mcr p15, 0, \ttbr1, c2, c0, 1 @ load TTB1 .endm - __CPUINIT - /* AT * TFR EV X F I D LR S * .EEE ..EE PUI. .T.T 4RVI ZWRS BLDP WCAM @@ -172,5 +170,3 @@ ENDPROC(cpu_v7_set_pte_ext) .type v7_crval, #object v7_crval: crval clear=0x2120c302, mmuset=0x10c03c7d, ucset=0x00c01c7c - - .previous diff --git a/arch/arm/mm/proc-v7-3level.S b/arch/arm/mm/proc-v7-3level.S index 5ffe1956c6d9..c36ac69488c8 100644 --- a/arch/arm/mm/proc-v7-3level.S +++ b/arch/arm/mm/proc-v7-3level.S @@ -140,8 +140,6 @@ ENDPROC(cpu_v7_set_pte_ext) mcrr p15, 0, \ttbr0, \zero, c2 @ load TTBR0 .endm - __CPUINIT - /* * AT * TFR EV X F IHD LR S @@ -153,5 +151,3 @@ ENDPROC(cpu_v7_set_pte_ext) .type v7_crval, #object v7_crval: crval clear=0x0120c302, mmuset=0x30c23c7d, ucset=0x00c01c7c - - .previous diff --git a/arch/arm/mm/proc-v7.S b/arch/arm/mm/proc-v7.S index 7ef3ad05df39..5c6d5a3050ea 100644 --- a/arch/arm/mm/proc-v7.S +++ b/arch/arm/mm/proc-v7.S @@ -167,8 +167,6 @@ ENDPROC(cpu_pj4b_do_idle) #endif - __CPUINIT - /* * __v7_setup * diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index e8efd83b6f25..dc1645890042 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -446,8 +446,6 @@ ENTRY(cpu_xsc3_do_resume) ENDPROC(cpu_xsc3_do_resume) #endif - __CPUINIT - .type __xsc3_setup, #function __xsc3_setup: mov r0, #PSR_F_BIT|PSR_I_BIT|SVC_MODE diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index e766f889bfd6..d19b1cfcad91 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S @@ -558,8 +558,6 @@ ENTRY(cpu_xscale_do_resume) ENDPROC(cpu_xscale_do_resume) #endif - __CPUINIT - .type __xscale_setup, #function __xscale_setup: mcr p15, 0, ip, c7, c7, 0 @ invalidate I, D caches & BTB |