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authorEric Bénard <eric@eukrea.com>2010-11-27 09:15:38 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2010-12-03 11:05:09 +0100
commit29bb6afcb077bd153c7738e73840dde808132fb5 (patch)
treef8530e4e7d36f3c0052fe0ad7e1d71703b6a1691 /arch/arm/plat-mxc
parent4e5cf41eeb254b7e50666496ac5697188b31320b (diff)
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plat-mxc/ehci.c: fix compile breakage
commits 2eb42d5c287f5e883a4b3ebe668ba880caa351e5 and 9e1dde33876ba83ad586c336647fff133d0f5472 renamed some defines but didn't fix all the places where these defines are used leading to a compile failure for USB on i.MX31, 35 and 27. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc')
-rw-r--r--arch/arm/plat-mxc/ehci.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 4bac3d5545d3..b79c8090197c 100644
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -115,7 +115,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
#endif /* if defined(CONFIG_SOC_IMX25) */
#if defined(CONFIG_ARCH_MX3)
if (cpu_is_mx31()) {
- v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
+ v = readl(MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
switch (port) {
@@ -153,13 +153,13 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
return -EINVAL;
}
- writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
+ writel(v, MX31_IO_ADDRESS(MX31_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
return 0;
}
if (cpu_is_mx35()) {
- v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+ v = readl(MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
switch (port) {
@@ -196,7 +196,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
return -EINVAL;
}
- writel(v, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+ writel(v, MX35_IO_ADDRESS(MX35_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
return 0;
}
@@ -206,7 +206,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
/* On i.MX27 we can use the i.MX31 USBCTRL bits, they
* are identical
*/
- v = readl(MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+ v = readl(MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
switch (port) {
case 0: /* OTG port */
@@ -241,7 +241,7 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
default:
return -EINVAL;
}
- writel(v, MX27_IO_ADDRESS(MX27_OTG_BASE_ADDR +
+ writel(v, MX27_IO_ADDRESS(MX27_USB_BASE_ADDR +
USBCTRL_OTGBASE_OFFSET));
return 0;
}