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| author | Shawn Guo <shawn.guo@linaro.org> | 2011-09-24 00:43:06 +0800 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:26:22 +0100 |
| commit | 1103643c266ae45c7098e0f7f3ee0b68e3e7c7cc (patch) | |
| tree | b7fb2f16ee3f6f66bfef60c28c8adf88b54d7524 /arch/arm/plat-mxc | |
| parent | bac89d754ba333453576fd38eb6073d7f89818fe (diff) | |
| download | linux-1103643c266ae45c7098e0f7f3ee0b68e3e7c7cc.tar.gz linux-1103643c266ae45c7098e0f7f3ee0b68e3e7c7cc.tar.bz2 linux-1103643c266ae45c7098e0f7f3ee0b68e3e7c7cc.zip | |
arm/imx: add gic_handle_irq function
This is a plain translation of assembly gic irq handler to C function
for CONFIG_MULTI_IRQ_HANDLER support on imx family.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/plat-mxc')
| -rw-r--r-- | arch/arm/plat-mxc/Makefile | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/gic.c | 48 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/common.h | 2 | ||||
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/entry-macro.S | 6 |
4 files changed, 57 insertions, 1 deletions
diff --git a/arch/arm/plat-mxc/Makefile b/arch/arm/plat-mxc/Makefile index d53c35fe2ea7..b9f0f5f499a4 100644 --- a/arch/arm/plat-mxc/Makefile +++ b/arch/arm/plat-mxc/Makefile @@ -5,7 +5,7 @@ # Common support obj-y := clock.o time.o devices.o cpu.o system.o irq-common.o -# MX51 uses the TZIC interrupt controller, older platforms use AVIC +obj-$(CONFIG_ARM_GIC) += gic.o obj-$(CONFIG_MXC_TZIC) += tzic.o obj-$(CONFIG_MXC_AVIC) += avic.o diff --git a/arch/arm/plat-mxc/gic.c b/arch/arm/plat-mxc/gic.c new file mode 100644 index 000000000000..b3b8eed263b8 --- /dev/null +++ b/arch/arm/plat-mxc/gic.c @@ -0,0 +1,48 @@ +/* + * Copyright 2011 Freescale Semiconductor, Inc. + * Copyright 2011 Linaro Ltd. + * + * The code contained herein is licensed under the GNU General Public + * License. You may obtain a copy of the GNU General Public License + * Version 2 or later at the following locations: + * + * http://www.opensource.org/licenses/gpl-license.html + * http://www.gnu.org/copyleft/gpl.html + */ + +#include <linux/io.h> +#include <asm/exception.h> +#include <asm/localtimer.h> +#include <asm/hardware/gic.h> +#ifdef CONFIG_SMP +#include <asm/smp.h> +#endif + +asmlinkage void __exception_irq_entry gic_handle_irq(struct pt_regs *regs) +{ + u32 irqstat, irqnr; + + do { + irqstat = readl_relaxed(gic_cpu_base_addr + GIC_CPU_INTACK); + irqnr = irqstat & 0x3ff; + if (irqnr == 1023) + break; + + if (irqnr > 29 && irqnr < 1021) + handle_IRQ(irqnr, regs); +#ifdef CONFIG_SMP + else if (irqnr < 16) { + writel_relaxed(irqstat, gic_cpu_base_addr + + GIC_CPU_EOI); + handle_IPI(irqnr, regs); + } +#endif +#ifdef CONFIG_LOCAL_TIMERS + else if (irqnr == 29) { + writel_relaxed(irqstat, gic_cpu_base_addr + + GIC_CPU_EOI); + handle_local_timer(regs); + } +#endif + } while (1); +} diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index ace4bb550edc..c2258374488a 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h @@ -86,6 +86,7 @@ extern void imx_print_silicon_rev(const char *cpu, int srev); void avic_handle_irq(struct pt_regs *); void tzic_handle_irq(struct pt_regs *); +void gic_handle_irq(struct pt_regs *); #define imx1_handle_irq avic_handle_irq #define imx21_handle_irq avic_handle_irq @@ -96,5 +97,6 @@ void tzic_handle_irq(struct pt_regs *); #define imx50_handle_irq tzic_handle_irq #define imx51_handle_irq tzic_handle_irq #define imx53_handle_irq tzic_handle_irq +#define imx6q_handle_irq gic_handle_irq #endif diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index 842fbcb0d6cc..9fe0dfcf4e7e 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S @@ -22,3 +22,9 @@ .macro get_irqnr_and_base, irqnr, irqstat, base, tmp .endm + + .macro test_for_ipi, irqnr, irqstat, base, tmp + .endm + + .macro test_for_ltirq, irqnr, irqstat, base, tmp + .endm |