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author | Thomas Gleixner <tglx@linutronix.de> | 2017-11-14 10:01:49 +0100 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-11-14 10:01:49 +0100 |
commit | d4bfeabe9ff7967f4b8c24aabf2de1ce3a909cd9 (patch) | |
tree | 6b419b8497c7d57ddec20a3558697ef36ea37b11 /arch/arm64/boot/dts/mediatek/mt8173.dtsi | |
parent | 8a7a8e1eab929eb3a5b735a788a23b9731139046 (diff) | |
parent | b29c6ef7bb1257853c1e31616d84f55e561cf631 (diff) | |
download | linux-d4bfeabe9ff7967f4b8c24aabf2de1ce3a909cd9.tar.gz linux-d4bfeabe9ff7967f4b8c24aabf2de1ce3a909cd9.tar.bz2 linux-d4bfeabe9ff7967f4b8c24aabf2de1ce3a909cd9.zip |
Merge branch 'linus' into timers/urgent
Get upstream changes so dependent patches can be applied.
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8173.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 12 |
1 files changed, 4 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index b99a27372965..26396ef53bde 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -682,8 +682,7 @@ }; mmc0: mmc@11230000 { - compatible = "mediatek,mt8173-mmc", - "mediatek,mt8135-mmc"; + compatible = "mediatek,mt8173-mmc"; reg = <0 0x11230000 0 0x1000>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_LOW>; clocks = <&pericfg CLK_PERI_MSDC30_0>, @@ -693,8 +692,7 @@ }; mmc1: mmc@11240000 { - compatible = "mediatek,mt8173-mmc", - "mediatek,mt8135-mmc"; + compatible = "mediatek,mt8173-mmc"; reg = <0 0x11240000 0 0x1000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_LOW>; clocks = <&pericfg CLK_PERI_MSDC30_1>, @@ -704,8 +702,7 @@ }; mmc2: mmc@11250000 { - compatible = "mediatek,mt8173-mmc", - "mediatek,mt8135-mmc"; + compatible = "mediatek,mt8173-mmc"; reg = <0 0x11250000 0 0x1000>; interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_LOW>; clocks = <&pericfg CLK_PERI_MSDC30_2>, @@ -715,8 +712,7 @@ }; mmc3: mmc@11260000 { - compatible = "mediatek,mt8173-mmc", - "mediatek,mt8135-mmc"; + compatible = "mediatek,mt8173-mmc"; reg = <0 0x11260000 0 0x1000>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_LOW>; clocks = <&pericfg CLK_PERI_MSDC30_3>, |