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| author | Michal Simek <michal.simek@xilinx.com> | 2015-07-27 11:15:38 +0200 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2015-07-31 10:46:26 +0200 |
| commit | 3a8691f5300a4933a54bf8db8d5754b68a92e3c2 (patch) | |
| tree | 5f6601c3f7d626d8274d9b3db9326dbd7d1fff9c /arch/arm64/boot | |
| parent | b72b44b617d21e01d3f73069a908e75c4e91c5bd (diff) | |
| download | linux-3a8691f5300a4933a54bf8db8d5754b68a92e3c2.tar.gz linux-3a8691f5300a4933a54bf8db8d5754b68a92e3c2.tar.bz2 linux-3a8691f5300a4933a54bf8db8d5754b68a92e3c2.zip | |
ARM64: zynqmp: Add CANs node for platform
Also enable can0 for ep108.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts | 4 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 24 |
2 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts index 53a9e5baa5b8..b36a2fccf7fc 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts +++ b/arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts @@ -32,6 +32,10 @@ }; }; +&can0 { + status = "okay"; +}; + &gem0 { status = "okay"; phy-handle = <&phy0>; diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 104f50c2f823..7ff829c1d4bf 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -96,6 +96,30 @@ #size-cells = <1>; ranges; + can0: can@ff060000 { + compatible = "xlnx,zynq-can-1.0"; + status = "disabled"; + clocks = <&misc_clk &misc_clk>; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff060000 0x1000>; + interrupts = <0 23 4>; + interrupt-parent = <&gic>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + + can1: can@ff070000 { + compatible = "xlnx,zynq-can-1.0"; + status = "disabled"; + clocks = <&misc_clk &misc_clk>; + clock-names = "can_clk", "pclk"; + reg = <0x0 0xff070000 0x1000>; + interrupts = <0 24 4>; + interrupt-parent = <&gic>; + tx-fifo-depth = <0x40>; + rx-fifo-depth = <0x40>; + }; + misc_clk: misc_clk { compatible = "fixed-clock"; #clock-cells = <0>; |