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| author | Catalin Marinas <catalin.marinas@arm.com> | 2018-05-11 13:33:12 +0100 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-05-15 13:29:55 +0100 |
| commit | ebc7e21e0fa28c46b938baed292c77e2d3ef8165 (patch) | |
| tree | fa415205a2ea1ff232aee0b7a6c4e998837b77ef /arch/arm64/kernel/cpufeature.c | |
| parent | d93277b9839b0bde06238a7a7f644114edb2ad4a (diff) | |
| download | linux-ebc7e21e0fa28c46b938baed292c77e2d3ef8165.tar.gz linux-ebc7e21e0fa28c46b938baed292c77e2d3ef8165.tar.bz2 linux-ebc7e21e0fa28c46b938baed292c77e2d3ef8165.zip | |
arm64: Increase ARCH_DMA_MINALIGN to 128
This patch increases the ARCH_DMA_MINALIGN to 128 so that it covers the
currently known Cache Writeback Granule (CTR_EL0.CWG) on arm64 and moves
the fallback in cache_line_size() from L1_CACHE_BYTES to this constant.
In addition, it warns (and taints) if the CWG is larger than
ARCH_DMA_MINALIGN as this is not safe with non-coherent DMA.
Cc: Will Deacon <will.deacon@arm.com>
Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/kernel/cpufeature.c')
| -rw-r--r-- | arch/arm64/kernel/cpufeature.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 9d1b06d67c53..fbee8c17a4e6 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -1606,7 +1606,6 @@ static void __init setup_system_capabilities(void) void __init setup_cpu_features(void) { u32 cwg; - int cls; setup_system_capabilities(); mark_const_caps_ready(); @@ -1627,13 +1626,9 @@ void __init setup_cpu_features(void) * Check for sane CTR_EL0.CWG value. */ cwg = cache_type_cwg(); - cls = cache_line_size(); if (!cwg) - pr_warn("No Cache Writeback Granule information, assuming cache line size %d\n", - cls); - if (L1_CACHE_BYTES < cls) - pr_warn("L1_CACHE_BYTES smaller than the Cache Writeback Granule (%d < %d)\n", - L1_CACHE_BYTES, cls); + pr_warn("No Cache Writeback Granule information, assuming %d\n", + ARCH_DMA_MINALIGN); } static bool __maybe_unused |