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authorChristoffer Dall <christoffer.dall@linaro.org>2018-01-17 12:35:27 +0100
committerChristoffer Dall <christoffer.dall@linaro.org>2018-01-17 13:57:49 +0100
commit0482b50546b12e82346903500af081ed329f915c (patch)
tree7a2bb3009bdf9117b3ed5b84b96f5cc7a3fc57de /arch/arm64/mm
parent448fadc8a4a36cad560e07b4fbc94cba49526956 (diff)
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arm64: mm: Add additional parameter to uaccess_ttbr0_disable
Add an extra temporary register parameter to uaccess_ttbr0_disable which is about to be required for arm64 PAN support. This patch doesn't introduce any functional change but ensures that the kernel compiles once the KVM/ARM tree is merged with the arm64 tree by ensuring a trivially mergable conflict with commit 6b88a32c7af68895134872cdec3b6bfdb532d94e ("arm64: kpti: Fix the interaction between ASID switching and software PAN"). Cc: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
Diffstat (limited to 'arch/arm64/mm')
-rw-r--r--arch/arm64/mm/cache.S4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index 5a52811f47e9..758bde7e2fa6 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -63,7 +63,7 @@ user_alt 9f, "dc cvau, x4", "dc civac, x4", ARM64_WORKAROUND_CLEAN_CACHE
invalidate_icache_by_line x0, x1, x2, x3, 9f
mov x0, #0
1:
- uaccess_ttbr0_disable x1
+ uaccess_ttbr0_disable x1, x2
ret
9:
mov x0, #-EFAULT
@@ -85,7 +85,7 @@ ENTRY(invalidate_icache_range)
invalidate_icache_by_line x0, x1, x2, x3, 2f
mov x0, xzr
1:
- uaccess_ttbr0_disable x1
+ uaccess_ttbr0_disable x1, x2
ret
2:
mov x0, #-EFAULT