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authorDuc Dang <dhdang@apm.com>2015-12-29 17:02:05 -0800
committerDuc Dang <dhdang@apm.com>2015-12-29 17:02:05 -0800
commit0fe8588fcaac6fff08937a338feb8e3082fe9e57 (patch)
treea437c61192a078d2bceea7406644d34eace9b1b8 /arch/arm64
parent93beff2c1455497f35c21c561d475be1101dbdc2 (diff)
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arm64: dts: X-Gene v1: I2C0 clock is always on
X-Gene v1 I2C0 and I2C1 controllers share the same clock enable register field. This patch remove clock node for I2C0 and leave I2C0 clock always on as having it toggled on/off will affect I2C1 operation. Signed-off-by: Duc Dang <dhdang@apm.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/apm/apm-storm.dtsi16
1 files changed, 1 insertions, 15 deletions
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index 17f5dc265975..fe30f7671ea3 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -437,20 +437,6 @@
reg-names = "csr-reg";
clock-output-names = "dmaclk";
};
-
- i2cclk: i2cclk@17000000 {
- status = "disabled";
- compatible = "apm,xgene-device-clock";
- #clock-cells = <1>;
- clocks = <&ahbclk 0>;
- reg = <0x0 0x17000000 0x0 0x2000>;
- reg-names = "csr-reg";
- csr-offset = <0xc>;
- csr-mask = <0x4>;
- enable-offset = <0x10>;
- enable-mask = <0x4>;
- clock-output-names = "i2cclk";
- };
};
msi: msi@79000000 {
@@ -789,7 +775,7 @@
reg = <0x0 0x10512000 0x0 0x1000>;
interrupts = <0 0x44 0x4>;
#clock-cells = <1>;
- clocks = <&i2cclk 0>;
+ clocks = <&ahbclk 0>;
bus_num = <0>;
};