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authorRussell King <rmk+kernel@armlinux.org.uk>2017-01-13 18:57:39 +0000
committerGregory CLEMENT <gregory.clement@free-electrons.com>2017-01-27 11:13:01 +0100
commit7292ff67b9b28feb3bef97b437f08c7e7568786f (patch)
tree1d79621f265a85ab2dde03b0733d04cbf5c49298 /arch/arm64
parentd3f4759bcf6171c77e1a4ffef94ba85296df4bc6 (diff)
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arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci
Testing with an Armada 8040 board shows that adding the generic-ahci compatible to the CP110 AHCI nodes gets us working AHCI on the board. A previous patch series posted by Thomas Petazzoni was retracted when it was realised that the IP was supposed to be, and is, compatible with the standard register layout. Add this compatible. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Diffstat (limited to 'arch/arm64')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi3
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi3
2 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 05222f749a45..a5fc201a9ddd 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -80,7 +80,8 @@
};
cpm_sata0: sata@540000 {
- compatible = "marvell,armada-8k-ahci";
+ compatible = "marvell,armada-8k-ahci",
+ "generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpm_syscon0 1 15>;
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index 638820ce977d..f52407456451 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -80,7 +80,8 @@
};
cps_sata0: sata@540000 {
- compatible = "marvell,armada-8k-ahci";
+ compatible = "marvell,armada-8k-ahci",
+ "generic-ahci";
reg = <0x540000 0x30000>;
interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cps_syscon0 1 15>;