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authorClaudiu Beznea <claudiu.beznea@microchip.com>2021-09-30 18:42:18 +0300
committerNicolas Ferre <nicolas.ferre@microchip.com>2021-10-04 11:54:20 +0200
commite42cbbe5c9a2a8423db4b1c32ec2a443d4de6323 (patch)
tree73d6bd099999f94cb19d34f958683a6f5751baf5 /arch/arm
parentef162ac50d5512e51da53b4c971597aabac7ea1f (diff)
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ARM: at91: pm: group constants and addresses loading
Group constants and addresses loading. This commit prepares the field for the next one. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com> Link: https://lore.kernel.org/r/20210930154219.2214051-3-claudiu.beznea@microchip.com
Diffstat (limited to 'arch/arm')
-rw-r--r--arch/arm/mach-at91/pm_suspend.S17
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/arm/mach-at91/pm_suspend.S b/arch/arm/mach-at91/pm_suspend.S
index cbd61a3bcab1..34f251fdb743 100644
--- a/arch/arm/mach-at91/pm_suspend.S
+++ b/arch/arm/mach-at91/pm_suspend.S
@@ -1014,6 +1014,15 @@ ENTRY(at91_pm_suspend_in_sram)
mov tmp1, #0
mcr p15, 0, tmp1, c7, c10, 4
+ ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
+ str tmp1, .mckr_offset
+ ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
+ str tmp1, .pmc_version
+ ldr tmp1, [r0, #PM_DATA_MEMCTRL]
+ str tmp1, .memtype
+ ldr tmp1, [r0, #PM_DATA_MODE]
+ str tmp1, .pm_mode
+
ldr tmp1, [r0, #PM_DATA_PMC]
str tmp1, .pmc_base
ldr tmp1, [r0, #PM_DATA_RAMC0]
@@ -1022,14 +1031,6 @@ ENTRY(at91_pm_suspend_in_sram)
str tmp1, .sramc1_base
ldr tmp1, [r0, #PM_DATA_RAMC_PHY]
str tmp1, .sramc_phy_base
- ldr tmp1, [r0, #PM_DATA_MEMCTRL]
- str tmp1, .memtype
- ldr tmp1, [r0, #PM_DATA_MODE]
- str tmp1, .pm_mode
- ldr tmp1, [r0, #PM_DATA_PMC_MCKR_OFFSET]
- str tmp1, .mckr_offset
- ldr tmp1, [r0, #PM_DATA_PMC_VERSION]
- str tmp1, .pmc_version
/* Both ldrne below are here to preload their address in the TLB */
ldr tmp1, [r0, #PM_DATA_SHDWC]
str tmp1, .shdwc