diff options
author | Graf Yang <graf.yang@analog.com> | 2008-10-08 17:30:01 +0800 |
---|---|---|
committer | Bryan Wu <cooloney@kernel.org> | 2008-10-08 17:30:01 +0800 |
commit | ca87b7ad00a620f259048fdfb27dc2a5384c1e4e (patch) | |
tree | 1653559472f74c189cf62d03085b6ee040738021 /arch/blackfin/Kconfig | |
parent | 7d98c881eed9e19767bc77ffd650d0041b4f41ec (diff) | |
download | linux-ca87b7ad00a620f259048fdfb27dc2a5384c1e4e.tar.gz linux-ca87b7ad00a620f259048fdfb27dc2a5384c1e4e.tar.bz2 linux-ca87b7ad00a620f259048fdfb27dc2a5384c1e4e.zip |
Blackfin arch: add CONFIG_APP_STACKS_L1 to enable or disable putting kernel stacks in L1
use CONFIG_APP_STACKS_L1 to enable or disable putting kernel stacks in L1,
default is enabled, SMP kernel need turn it off
Signed-off-by: Graf Yang <graf.yang@analog.com>
Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/Kconfig')
-rw-r--r-- | arch/blackfin/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/blackfin/Kconfig b/arch/blackfin/Kconfig index c507a92cb289..9d936a3986c8 100644 --- a/arch/blackfin/Kconfig +++ b/arch/blackfin/Kconfig @@ -629,6 +629,15 @@ config CPLB_SWITCH_TAB_L1 If enabled, the CPLB Switch Tables are linked into L1 data memory. (less latency) +config APP_STACK_L1 + bool "Support locating application stack in L1 Scratch Memory" + default y + help + If enabled the application stack can be located in L1 + scratch memory (less latency). + + Currently only works with FLAT binaries. + comment "Speed Optimizations" config BFIN_INS_LOWOVERHEAD bool "ins[bwl] low overhead, higher interrupt latency" |