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authorBarry Song <barry.song@analog.com>2010-01-07 04:11:17 +0000
committerMike Frysinger <vapier@gentoo.org>2010-03-09 00:30:48 -0500
commitd86bfb1600db38e8387beee0aaab4263cfd728a2 (patch)
tree95e6f3d77d6dede480d74a7a4b87f2794a5b31fe /arch/blackfin/kernel/cplb-mpu/cplbinit.c
parentaad16f32284030907b4f105e92e5fb534fd272bc (diff)
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Blackfin: initial XIP support
Signed-off-by: Barry Song <barry.song@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/kernel/cplb-mpu/cplbinit.c')
-rw-r--r--arch/blackfin/kernel/cplb-mpu/cplbinit.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/blackfin/kernel/cplb-mpu/cplbinit.c b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
index 8d42b9e50dfa..30fd6417f069 100644
--- a/arch/blackfin/kernel/cplb-mpu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-mpu/cplbinit.c
@@ -64,6 +64,15 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
icplb_tbl[cpu][i_i++].data = i_data | (addr == 0 ? CPLB_USER_RD : 0);
}
+#ifdef CONFIG_ROMKERNEL
+ /* Cover kernel XIP flash area */
+ addr = CONFIG_ROM_BASE & ~(4 * 1024 * 1024 - 1);
+ dcplb_tbl[cpu][i_d].addr = addr;
+ dcplb_tbl[cpu][i_d++].data = d_data | CPLB_USER_RD;
+ icplb_tbl[cpu][i_i].addr = addr;
+ icplb_tbl[cpu][i_i++].data = i_data | CPLB_USER_RD;
+#endif
+
/* Cover L1 memory. One 4M area for code and data each is enough. */
#if L1_DATA_A_LENGTH > 0 || L1_DATA_B_LENGTH > 0
dcplb_tbl[cpu][i_d].addr = get_l1_data_a_start_cpu(cpu);