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authorH. Peter Anvin <hpa@zytor.com>2008-09-04 08:08:42 -0700
committerH. Peter Anvin <hpa@zytor.com>2008-09-04 08:08:42 -0700
commit7203781c98ad9147564d327de6f6513ad8fc0f4e (patch)
tree5c29a2a04a626bf08a0d56fd8a0068b3c92ad284 /arch/blackfin/kernel/cplb-nompu/cplbinit.c
parent671eef85a3e885dff4ce210d8774ad50a91d5967 (diff)
parentaf2e1f276ff08f17192411ea3b71c13a758dfe12 (diff)
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Merge branch 'x86/cpu' into x86/core
Conflicts: arch/x86/kernel/cpu/feature_names.c include/asm-x86/cpufeature.h
Diffstat (limited to 'arch/blackfin/kernel/cplb-nompu/cplbinit.c')
-rw-r--r--arch/blackfin/kernel/cplb-nompu/cplbinit.c6
1 files changed, 1 insertions, 5 deletions
diff --git a/arch/blackfin/kernel/cplb-nompu/cplbinit.c b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
index 224e7cc30bc5..728f708d3981 100644
--- a/arch/blackfin/kernel/cplb-nompu/cplbinit.c
+++ b/arch/blackfin/kernel/cplb-nompu/cplbinit.c
@@ -164,17 +164,13 @@ static struct cplb_desc cplb_data[] = {
.name = "Asynchronous Memory Banks",
},
{
-#ifdef L2_START
.start = L2_START,
.end = L2_START + L2_LENGTH,
.psize = SIZE_1M,
.attr = SWITCH_T | I_CPLB | D_CPLB,
.i_conf = L2_MEMORY,
.d_conf = L2_MEMORY,
- .valid = 1,
-#else
- .valid = 0,
-#endif
+ .valid = (L2_LENGTH > 0),
.name = "L2 Memory",
},
{