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author | Mike Frysinger <vapier@gentoo.org> | 2009-10-15 03:45:47 +0000 |
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committer | Mike Frysinger <vapier@gentoo.org> | 2009-12-15 00:14:40 -0500 |
commit | cd32cc73625641c068393978e7bb337d29c0cd29 (patch) | |
tree | 2919e991260ccb6603b9ac713cd0dff5f83d8854 /arch/blackfin/mach-bf518/include/mach/defBF51x_base.h | |
parent | b1fa2e8f626e997c2c4f991f10ed00b6ee080b99 (diff) | |
download | linux-cd32cc73625641c068393978e7bb337d29c0cd29.tar.gz linux-cd32cc73625641c068393978e7bb337d29c0cd29.tar.bz2 linux-cd32cc73625641c068393978e7bb337d29c0cd29.zip |
Blackfin: punt OTP MMRs
People should not be accessing OTP MMRs directly. They should instead go
through the Blackfin ROM helper functions.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf518/include/mach/defBF51x_base.h')
-rw-r--r-- | arch/blackfin/mach-bf518/include/mach/defBF51x_base.h | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h index 83e8c34547b3..78253e838f3d 100644 --- a/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h +++ b/arch/blackfin/mach-bf518/include/mach/defBF51x_base.h @@ -1770,46 +1770,6 @@ #define BNDMODE_CAPT 0x2000 /* boundary capture mode */ #define BNDMODE_AEXT 0x3000 /* boundary auto-extend mode */ -/* Bit masks for OTP_CONTROL */ - -#define FUSE_FADDR 0x1ff /* OTP/Fuse Address */ -#define FIEN 0x800 /* OTP/Fuse Interrupt Enable */ -#define nFIEN 0x0 -#define FTESTDEC 0x1000 /* OTP/Fuse Test Decoder */ -#define nFTESTDEC 0x0 -#define FWRTEST 0x2000 /* OTP/Fuse Write Test */ -#define nFWRTEST 0x0 -#define FRDEN 0x4000 /* OTP/Fuse Read Enable */ -#define nFRDEN 0x0 -#define FWREN 0x8000 /* OTP/Fuse Write Enable */ -#define nFWREN 0x0 - -/* Bit masks for OTP_BEN */ - -#define FBEN 0xffff /* OTP/Fuse Byte Enable */ - -/* Bit masks for OTP_STATUS */ - -#define FCOMP 0x1 /* OTP/Fuse Access Complete */ -#define nFCOMP 0x0 -#define FERROR 0x2 /* OTP/Fuse Access Error */ -#define nFERROR 0x0 -#define MMRGLOAD 0x10 /* Memory Mapped Register Gasket Load */ -#define nMMRGLOAD 0x0 -#define MMRGLOCK 0x20 /* Memory Mapped Register Gasket Lock */ -#define nMMRGLOCK 0x0 -#define FPGMEN 0x40 /* OTP/Fuse Program Enable */ -#define nFPGMEN 0x0 - -/* Bit masks for OTP_TIMING */ - -#define USECDIV 0xff /* Micro Second Divider */ -#define READACC 0x7f00 /* Read Access Time */ -#define CPUMPRL 0x38000 /* Charge Pump Release Time */ -#define CPUMPSU 0xc0000 /* Charge Pump Setup Time */ -#define CPUMPHD 0xf00000 /* Charge Pump Hold Time */ -#define PGMTIME 0xff000000 /* Program Time */ - /* Bit masks for SECURE_SYSSWT */ #define EMUDABL 0x1 /* Emulation Disable. */ |