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| author | Mike Frysinger <vapier@gentoo.org> | 2010-10-25 08:04:44 +0000 |
|---|---|---|
| committer | Mike Frysinger <vapier@gentoo.org> | 2011-01-10 07:18:05 -0500 |
| commit | 9346dba55672a6f04b7bfd1faa081ff149995a3f (patch) | |
| tree | 78720838d17b73ab0a535fa907df9b805f5a7442 /arch/blackfin/mach-bf527/include/mach/defBF52x_base.h | |
| parent | 6c8e75a06c8ee32c68ce90afa4a0fe093327b0e4 (diff) | |
| download | linux-9346dba55672a6f04b7bfd1faa081ff149995a3f.tar.gz linux-9346dba55672a6f04b7bfd1faa081ff149995a3f.tar.bz2 linux-9346dba55672a6f04b7bfd1faa081ff149995a3f.zip | |
Blackfin: standardize DMAC traffic control MMRs & MDMA MMRs
Use the same naming convention for DMA traffic MMRs (most were legacy
anyways) so we can avoid useless ifdef trees.
Same goes for MDMA names -- this actually allows us to undo a bunch of
ifdef redirects that existed for this purpose alone.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Diffstat (limited to 'arch/blackfin/mach-bf527/include/mach/defBF52x_base.h')
| -rw-r--r-- | arch/blackfin/mach-bf527/include/mach/defBF52x_base.h | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h index d2594f3b14bc..2e6f8aa4acb6 100644 --- a/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h +++ b/arch/blackfin/mach-bf527/include/mach/defBF52x_base.h @@ -215,12 +215,8 @@ /* DMA Traffic Control Registers */ -#define DMA_TC_PER 0xFFC00B0C /* Traffic Control Periods Register */ -#define DMA_TC_CNT 0xFFC00B10 /* Traffic Control Current Counts Register */ - -/* Alternate deprecated register names (below) provided for backwards code compatibility */ -#define DMA_TCPER 0xFFC00B0C /* Traffic Control Periods Register */ -#define DMA_TCCNT 0xFFC00B10 /* Traffic Control Current Counts Register */ +#define DMAC_TC_PER 0xFFC00B0C /* Traffic Control Periods Register */ +#define DMAC_TC_CNT 0xFFC00B10 /* Traffic Control Current Counts Register */ /* DMA Controller (0xFFC00C00 - 0xFFC00FFF) */ #define DMA0_NEXT_DESC_PTR 0xFFC00C00 /* DMA Channel 0 Next Descriptor Pointer Register */ |