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| author | Olivier Galibert <galibert@pobox.com> | 2007-05-02 19:27:22 +0200 |
|---|---|---|
| committer | Andi Kleen <andi@basil.nowhere.org> | 2007-05-02 19:27:22 +0200 |
| commit | b5229dbb857f61d77d8d4048d9033387a5411b8e (patch) | |
| tree | ee60c2304a6cee5b0e6a0bb25aa20192bb084d32 /arch/i386 | |
| parent | 6c2af35820f100bde7b9de8a00a76faa7af6bede (diff) | |
| download | linux-b5229dbb857f61d77d8d4048d9033387a5411b8e.tar.gz linux-b5229dbb857f61d77d8d4048d9033387a5411b8e.tar.bz2 linux-b5229dbb857f61d77d8d4048d9033387a5411b8e.zip | |
[PATCH] i386: Some additional chipset register values validation.
On i945, a mmconfig range hitting the f0000000-ffffffff zone conflicts
with the APIC registers and others. Consider it invalid.
On E7520, values 0000 and f000 for the window register are defined
invalid in the documentation.
I haven't seen a bios use these values, but who trusts biosen these
days?
Signed-off-by: Olivier Galibert <galibert@pobox.com>
Signed-off-by: Andi Kleen <ak@suse.de>
arch/i386/pci/mmconfig-shared.c | 25 +++++++++++++++++--------
1 file changed, 17 insertions(+), 8 deletions(-)
Diffstat (limited to 'arch/i386')
| -rw-r--r-- | arch/i386/pci/mmconfig-shared.c | 25 |
1 files changed, 17 insertions, 8 deletions
diff --git a/arch/i386/pci/mmconfig-shared.c b/arch/i386/pci/mmconfig-shared.c index 747d8c63b0c4..c7cabeed4d7b 100644 --- a/arch/i386/pci/mmconfig-shared.c +++ b/arch/i386/pci/mmconfig-shared.c @@ -60,14 +60,19 @@ static const char __init *pci_mmcfg_e7520(void) u32 win; pci_conf1_read(0, 0, PCI_DEVFN(0,0), 0xce, 2, &win); - pci_mmcfg_config_num = 1; - pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL); - if (!pci_mmcfg_config) - return NULL; - pci_mmcfg_config[0].address = (win & 0xf000) << 16; - pci_mmcfg_config[0].pci_segment = 0; - pci_mmcfg_config[0].start_bus_number = 0; - pci_mmcfg_config[0].end_bus_number = 255; + win = win & 0xf000; + if(win == 0x0000 || win == 0xf000) + pci_mmcfg_config_num = 0; + else { + pci_mmcfg_config_num = 1; + pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL); + if (!pci_mmcfg_config) + return NULL; + pci_mmcfg_config[0].address = win << 16; + pci_mmcfg_config[0].pci_segment = 0; + pci_mmcfg_config[0].start_bus_number = 0; + pci_mmcfg_config[0].end_bus_number = 255; + } return "Intel Corporation E7520 Memory Controller Hub"; } @@ -108,6 +113,10 @@ static const char __init *pci_mmcfg_intel_945(void) if ((pciexbar & mask) & 0x0fffffffU) pci_mmcfg_config_num = 0; + /* Don't hit the APIC registers and their friends */ + if ((pciexbar & mask) >= 0xf0000000U) + pci_mmcfg_config_num = 0; + if (pci_mmcfg_config_num) { pci_mmcfg_config = kzalloc(sizeof(pci_mmcfg_config[0]), GFP_KERNEL); if (!pci_mmcfg_config) |