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| author | Christoph Hellwig <hch@lst.de> | 2019-08-13 09:25:02 +0200 |
|---|---|---|
| committer | Tony Luck <tony.luck@intel.com> | 2019-08-16 11:33:57 -0700 |
| commit | 05933aac7b11911955de307a329dc2a7a14b7bd0 (patch) | |
| tree | 5fbf522b4adc70501eed8986930bc0744bbb7810 /arch/ia64/pci | |
| parent | cf07cb1ff4ea008abf06c95878c700cf1dd65c3e (diff) | |
| download | linux-05933aac7b11911955de307a329dc2a7a14b7bd0.tar.gz linux-05933aac7b11911955de307a329dc2a7a14b7bd0.tar.bz2 linux-05933aac7b11911955de307a329dc2a7a14b7bd0.zip | |
ia64: remove now unused machvec indirections
With the SGI SN2 machvec removal most of the indirections are unused
now, so remove them. This includes the entire removal of the mmio
read*/write* macros as the generic ones are identical to the
asm-generic/io.h version.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Link: https://lkml.kernel.org/r/20190813072514.23299-17-hch@lst.de
Signed-off-by: Tony Luck <tony.luck@intel.com>
Diffstat (limited to 'arch/ia64/pci')
| -rw-r--r-- | arch/ia64/pci/pci.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 165e561dc81a..89c9f36dc94d 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c @@ -372,7 +372,6 @@ void pcibios_fixup_bus(struct pci_bus *b) } list_for_each_entry(dev, &b->devices, bus_list) pcibios_fixup_device_resources(dev); - platform_pci_fixup_bus(b); } void pcibios_add_bus(struct pci_bus *bus) @@ -413,7 +412,7 @@ pcibios_disable_device (struct pci_dev *dev) } /** - * ia64_pci_get_legacy_mem - generic legacy mem routine + * pci_get_legacy_mem - generic legacy mem routine * @bus: bus to get legacy memory base address for * * Find the base of legacy memory for @bus. This is typically the first @@ -424,7 +423,7 @@ pcibios_disable_device (struct pci_dev *dev) * This is the ia64 generic version of this routine. Other platforms * are free to override it with a machine vector. */ -char *ia64_pci_get_legacy_mem(struct pci_bus *bus) +char *pci_get_legacy_mem(struct pci_bus *bus) { return (char *)__IA64_UNCACHED_OFFSET; } @@ -473,7 +472,7 @@ pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma, } /** - * ia64_pci_legacy_read - read from legacy I/O space + * pci_legacy_read - read from legacy I/O space * @bus: bus to read * @port: legacy port value * @val: caller allocated storage for returned value @@ -485,7 +484,7 @@ pci_mmap_legacy_page_range(struct pci_bus *bus, struct vm_area_struct *vma, * overridden by the platform. This is necessary on platforms that don't * support legacy I/O routing or that hard fail on legacy I/O timeouts. */ -int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size) +int pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size) { int ret = size; @@ -508,7 +507,7 @@ int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size) } /** - * ia64_pci_legacy_write - perform a legacy I/O write + * pci_legacy_write - perform a legacy I/O write * @bus: bus pointer * @port: port to write * @val: value to write @@ -516,7 +515,7 @@ int ia64_pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size) * * Simply writes @size bytes of @val to @port. */ -int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size) +int pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size) { int ret = size; |