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author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-13 10:24:52 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-01-13 10:24:52 -0800 |
commit | 67b5ad9a63caa2ce56ddd2b22b802dae00d72c13 (patch) | |
tree | f2ba8bda2e62efedf6009ab74e9e65a097f6e24d /arch/m68k | |
parent | 174a86dff2f3c72ef55d994b1e7faa7099d3f844 (diff) | |
parent | 88cce427626070f7d7eb33994e3ff7b4db3292c5 (diff) | |
download | linux-67b5ad9a63caa2ce56ddd2b22b802dae00d72c13.tar.gz linux-67b5ad9a63caa2ce56ddd2b22b802dae00d72c13.tar.bz2 linux-67b5ad9a63caa2ce56ddd2b22b802dae00d72c13.zip |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
* git://git.kernel.org/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog:
watchdog: Add MCF548x watchdog driver.
watchdog: add driver for the Atheros AR71XX/AR724X/AR913X SoCs
watchdog: Add TCO support for nVidia chipsets
watchdog: Add support for sp5100 chipset TCO
watchdog: f71808e_wdt: add F71862FG, F71869 to Kconfig
watchdog: iTCO_wdt: TCO Watchdog patch for Intel DH89xxCC PCH
watchdog: iTCO_wdt: TCO Watchdog patch for Intel NM10 DeviceIDs
watchdog: ks8695_wdt: include mach/hardware.h instead of mach/timex.h.
watchdog: Propagate Book E WDT period changes to all cores
watchdog: add CONFIG_WATCHDOG_NOWAYOUT support to PowerPC Book-E watchdog driver
watchdog: alim7101_wdt: fix compiler warning on alim7101_pci_tbl
watchdog: alim1535_wdt: fix compiler warning on ali_pci_tbl
watchdog: Fix reboot on W83627ehf chipset.
watchdog: Add watchdog support for W83627DHG chip
watchdog: f71808e_wdt: Add Fintek F71869 watchdog
watchdog: add f71862fg support
watchdog: clean-up f71808e_wdt.c
Diffstat (limited to 'arch/m68k')
-rw-r--r-- | arch/m68k/include/asm/m548xgpt.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/m68k/include/asm/m548xgpt.h b/arch/m68k/include/asm/m548xgpt.h index c8ef158a1c4e..33b2eef90f0a 100644 --- a/arch/m68k/include/asm/m548xgpt.h +++ b/arch/m68k/include/asm/m548xgpt.h @@ -59,11 +59,13 @@ #define MCF_GPT_GMS_GPIO_INPUT (0x00000000) #define MCF_GPT_GMS_GPIO_OUTLO (0x00000020) #define MCF_GPT_GMS_GPIO_OUTHI (0x00000030) +#define MCF_GPT_GMS_GPIO_MASK (0x00000030) #define MCF_GPT_GMS_TMS_DISABLE (0x00000000) #define MCF_GPT_GMS_TMS_INCAPT (0x00000001) #define MCF_GPT_GMS_TMS_OUTCAPT (0x00000002) #define MCF_GPT_GMS_TMS_PWM (0x00000003) #define MCF_GPT_GMS_TMS_GPIO (0x00000004) +#define MCF_GPT_GMS_TMS_MASK (0x00000007) /* Bit definitions and macros for MCF_GPT_GCIR */ #define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0) |