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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 18:32:48 +0200 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 22:24:19 +0200 |
| commit | 886ee1363a3ad2b890959f07cffe8d91d995b93a (patch) | |
| tree | cfc912405501a4508cc56c6b9b73f4407cc37187 /arch/mips/Kconfig | |
| parent | 24a1c023f3ff3082fee9c019c17e6a34e2ddfe6b (diff) | |
| download | linux-886ee1363a3ad2b890959f07cffe8d91d995b93a.tar.gz linux-886ee1363a3ad2b890959f07cffe8d91d995b93a.tar.bz2 linux-886ee1363a3ad2b890959f07cffe8d91d995b93a.zip | |
MIPS: Convert ICACHE_REFILLS_WORKAROUND_WAR into a config option
Use a new config option to enable I-cache refill workaround and remove
define from different war.h files.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/Kconfig')
| -rw-r--r-- | arch/mips/Kconfig | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 04a413d52b26..5df92ae935d4 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -568,6 +568,7 @@ config MIPS_MALTA select SYS_SUPPORTS_VPE_LOADER select SYS_SUPPORTS_ZBOOT select USE_OF + select WAR_ICACHE_REFILLS select ZONE_DMA32 if 64BIT help This enables support for the MIPS Technologies Malta evaluation @@ -756,6 +757,7 @@ config SGI_IP32 select SYS_HAS_CPU_NEVADA select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_BIG_ENDIAN + select WAR_ICACHE_REFILLS help If you want this kernel to run on SGI O2 workstation, say Y here. @@ -2666,6 +2668,13 @@ config WAR_R4600_V2_HIT_CACHEOP config WAR_TX49XX_ICACHE_INDEX_INV bool +# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra +# opposes it being called that) where invalid instructions in the same +# I-cache line worth of instructions being fetched may case spurious +# exceptions. +config WAR_ICACHE_REFILLS + bool + # # - Highmem only makes sense for the 32-bit kernel. # - The current highmem code will only work properly on physically indexed |