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authorThomas Bogendoerfer <tsbogend@alpha.franken.de>2022-02-18 11:04:39 +0100
committerThomas Bogendoerfer <tsbogend@alpha.franken.de>2022-02-22 09:35:49 +0100
commitb56d1cafefaa4550888bace142be404db36b96a1 (patch)
tree7eab945addbf343a45e714c8ea0a0478a5a0369c /arch/mips/Kconfig
parentc47c7ab9b53635860c6b48736efdd22822d726d7 (diff)
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MIPS: remove asm/war.h
The major part for workaround handling has already moved to config options. This change replaces the remaining defines by already available config options and gets rid of war.h Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/Kconfig')
-rw-r--r--arch/mips/Kconfig38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c6672547ac5e..f8f11542d044 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -2521,13 +2521,51 @@ config CPU_HAS_SYNC
#
# CPU non-features
#
+
+# Work around the "daddi" and "daddiu" CPU errata:
+#
+# - The `daddi' instruction fails to trap on overflow.
+# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
+# erratum #23
+#
+# - The `daddiu' instruction can produce an incorrect result.
+# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
+# erratum #41
+# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
+# #15
+# "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
+# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
config CPU_DADDI_WORKAROUNDS
bool
+# Work around certain R4000 CPU errata (as implemented by GCC):
+#
+# - A double-word or a variable shift may give an incorrect result
+# if executed immediately after starting an integer division:
+# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
+# erratum #28
+# "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
+# #19
+#
+# - A double-word or a variable shift may give an incorrect result
+# if executed while an integer multiplication is in progress:
+# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
+# errata #16 & #28
+#
+# - An integer division may give an incorrect result if started in
+# a delay slot of a taken branch or a jump:
+# "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
+# erratum #52
config CPU_R4000_WORKAROUNDS
bool
select CPU_R4400_WORKAROUNDS
+# Work around certain R4400 CPU errata (as implemented by GCC):
+#
+# - A double-word or a variable shift may give an incorrect result
+# if executed immediately after starting an integer division:
+# "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
+# "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
config CPU_R4400_WORKAROUNDS
bool