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authorSergey Ryazanov <ryazanov.s.a@gmail.com>2014-10-29 03:18:41 +0400
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:45:27 +0100
commit1753e74ed8fa3235174d5baa3421cbf8d693a42d (patch)
treebb6b196bb76d05dfb2be056218643ed2c0513baa /arch/mips/ath25/devices.h
parentba910345034aea52d292bdc26b9c6831ab7b54e8 (diff)
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MIPS: ath25: add interrupts handling routines
Add interrupts initialization and handling routines, also add AHB bus error interrupt handlers for both SoCs families. Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Linux MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/8240/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25/devices.h')
-rw-r--r--arch/mips/ath25/devices.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/mips/ath25/devices.h b/arch/mips/ath25/devices.h
index e25a3262256d..2985586a0f2c 100644
--- a/arch/mips/ath25/devices.h
+++ b/arch/mips/ath25/devices.h
@@ -5,6 +5,10 @@
#define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S)
+#define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */
+
+extern void (*ath25_irq_dispatch)(void);
+
static inline bool is_ar2315(void)
{
return (current_cpu_data.cputype == CPU_4KEC);