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authorGabor Juhos <juhosg@openwrt.org>2011-01-04 21:28:15 +0100
committerRalf Baechle <ralf@linux-mips.org>2011-01-18 19:30:25 +0100
commit6eae43c57ee92de91f6cc7c391cea97c43295da0 (patch)
tree5ac5521d28527e6218faea0f31cc888df65dbc9f /arch/mips/ath79/setup.c
parentd4a67d9dc8a5a80c4ec1814791af8c0252c158b8 (diff)
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MIPS: ath79: add GPIOLIB support
This patch implements generic GPIO routines for the built-in GPIO controllers of the Atheros AR71XX/AR724X/AR913X SoCs. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Imre Kaloz <kaloz@openwrt.org> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: linux-mips@linux-mips.org Cc: Luis R. Rodriguez <lrodriguez@atheros.com> Cc: Cliff Holden <Cliff.Holden@Atheros.com> Cc: Kathy Giori <Kathy.Giori@Atheros.com> Patchwork: https://patchwork.linux-mips.org/patch/1948/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath79/setup.c')
-rw-r--r--arch/mips/ath79/setup.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ath79/setup.c b/arch/mips/ath79/setup.c
index 175def860165..29dde98f49ed 100644
--- a/arch/mips/ath79/setup.c
+++ b/arch/mips/ath79/setup.c
@@ -157,7 +157,6 @@ void __init plat_mem_setup(void)
AR71XX_RESET_SIZE);
ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
AR71XX_PLL_SIZE);
-
ath79_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
AR71XX_DDR_CTRL_SIZE);
@@ -183,6 +182,7 @@ void __init plat_time_init(void)
static int __init ath79_setup(void)
{
+ ath79_gpio_init();
ath79_register_uart();
return 0;
}