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authorMaxime Bizon <mbizon@freebox.fr>2012-07-13 07:46:05 +0000
committerJohn Crispin <blogic@openwrt.org>2012-08-24 20:09:01 +0200
commit58e380afb67aeeb0416f3ea25f0d8007b03cb513 (patch)
treeb2b2686a9ca9f26d5831eedd867d135d850b6e8c /arch/mips/bcm63xx/irq.c
parent6d591805917cbc691e34cb3f8a10fef5997889bf (diff)
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MIPS: BCM63XX: use a switch for external irq config
Makes the code a bit more readable and easier to add support for new chips. Signed-off-by: Maxime Bizon <mbizon@freebox.fr> Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/4093/ Signed-off-by: John Crispin <blogic@openwrt.org>
Diffstat (limited to 'arch/mips/bcm63xx/irq.c')
-rw-r--r--arch/mips/bcm63xx/irq.c14
1 files changed, 11 insertions, 3 deletions
diff --git a/arch/mips/bcm63xx/irq.c b/arch/mips/bcm63xx/irq.c
index d40169f83259..da24c2bd9b7c 100644
--- a/arch/mips/bcm63xx/irq.c
+++ b/arch/mips/bcm63xx/irq.c
@@ -438,7 +438,8 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
reg = bcm_perf_readl(regaddr);
irq %= 4;
- if (BCMCPU_IS_6348()) {
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6348_CPU_ID:
if (levelsense)
reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
else
@@ -451,9 +452,13 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
else
reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
- }
+ break;
- if (BCMCPU_IS_6338() || BCMCPU_IS_6358() || BCMCPU_IS_6368()) {
+ case BCM6328_CPU_ID:
+ case BCM6338_CPU_ID:
+ case BCM6345_CPU_ID:
+ case BCM6358_CPU_ID:
+ case BCM6368_CPU_ID:
if (levelsense)
reg |= EXTIRQ_CFG_LEVELSENSE(irq);
else
@@ -466,6 +471,9 @@ static int bcm63xx_external_irq_set_type(struct irq_data *d,
reg |= EXTIRQ_CFG_BOTHEDGE(irq);
else
reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+ break;
+ default:
+ BUG();
}
bcm_perf_writel(reg, regaddr);