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author | Manuel Lauss <manuel.lauss@googlemail.com> | 2010-01-13 18:46:58 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2010-02-27 12:53:16 +0100 |
commit | aae7e8da806e1536fdee0632a40aaaeed97a2f1b (patch) | |
tree | 7a99dd46efd7b30171564a3328d6ca1351763e96 /arch/mips/boot | |
parent | 780019ddf02f214ad61e641b57b8ac30c837e2a7 (diff) | |
download | linux-aae7e8da806e1536fdee0632a40aaaeed97a2f1b.tar.gz linux-aae7e8da806e1536fdee0632a40aaaeed97a2f1b.tar.bz2 linux-aae7e8da806e1536fdee0632a40aaaeed97a2f1b.zip |
MIPS: Alchemy: debug output for compressed kernels
Hook up the compressed debug output for all Alchemy systems supported
by current kernel codebase.
Signed-off-by: Manuel Lauss <manuel.lauss@gmail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Wu Zhangjin <wuzhangjin@gmail.com>
Patchwork: http://patchwork.linux-mips.org/patch/879/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r-- | arch/mips/boot/compressed/Makefile | 1 | ||||
-rw-r--r-- | arch/mips/boot/compressed/uart-alchemy.c | 7 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile index b798830b7730..76d69303b833 100644 --- a/arch/mips/boot/compressed/Makefile +++ b/arch/mips/boot/compressed/Makefile @@ -36,6 +36,7 @@ KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ obj-y := $(obj)/head.o $(obj)/decompress.o $(obj)/dbg.o obj-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o +obj-$(CONFIG_MACH_ALCHEMY) += $(obj)/uart-alchemy.o OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S $(obj)/vmlinux.bin: $(KBUILD_IMAGE) diff --git a/arch/mips/boot/compressed/uart-alchemy.c b/arch/mips/boot/compressed/uart-alchemy.c new file mode 100644 index 000000000000..1bff22fa089b --- /dev/null +++ b/arch/mips/boot/compressed/uart-alchemy.c @@ -0,0 +1,7 @@ +#include <asm/mach-au1x00/au1000.h> + +void putc(char c) +{ + /* all current (Jan. 2010) in-kernel boards */ + alchemy_uart_putchar(UART0_PHYS_ADDR, c); +} |