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| author | Aaro Koskinen <aaro.koskinen@iki.fi> | 2019-01-27 22:24:30 +0200 |
|---|---|---|
| committer | Paul Burton <paul.burton@mips.com> | 2019-01-28 15:17:39 -0800 |
| commit | 6aa08988f1f8df6641273dff4c37a98580c68968 (patch) | |
| tree | 6f9a04105049cb0258d03831f851e8b577cfab30 /arch/mips/cavium-octeon | |
| parent | a0f0b69f2c15c12eb45b4e8d76f704ba9bc9c126 (diff) | |
| download | linux-6aa08988f1f8df6641273dff4c37a98580c68968.tar.gz linux-6aa08988f1f8df6641273dff4c37a98580c68968.tar.bz2 linux-6aa08988f1f8df6641273dff4c37a98580c68968.zip | |
MIPS: OCTEON: delete SMI/MDIO enable
SMI/MDIO enable is handled by the OCTEON MDIO driver, so we can delete
the duplicated functionality from the platform code.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Diffstat (limited to 'arch/mips/cavium-octeon')
| -rw-r--r-- | arch/mips/cavium-octeon/executive/cvmx-helper.c | 20 |
1 files changed, 0 insertions, 20 deletions
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper.c b/arch/mips/cavium-octeon/executive/cvmx-helper.c index 38e0444e57e8..520c3bc66655 100644 --- a/arch/mips/cavium-octeon/executive/cvmx-helper.c +++ b/arch/mips/cavium-octeon/executive/cvmx-helper.c @@ -43,7 +43,6 @@ #include <asm/octeon/cvmx-helper-board.h> #include <asm/octeon/cvmx-pip-defs.h> -#include <asm/octeon/cvmx-smix-defs.h> #include <asm/octeon/cvmx-asxx-defs.h> /* Port count per interface */ @@ -1026,7 +1025,6 @@ int cvmx_helper_initialize_packet_io_global(void) int result = 0; int interface; union cvmx_l2c_cfg l2c_cfg; - union cvmx_smix_en smix_en; const int num_interfaces = cvmx_helper_get_number_of_interfaces(); /* @@ -1046,24 +1044,6 @@ int cvmx_helper_initialize_packet_io_global(void) l2c_cfg.s.rfb_arb_mode = 0; cvmx_write_csr(CVMX_L2C_CFG, l2c_cfg.u64); - /* Make sure SMI/MDIO is enabled so we can query PHYs */ - smix_en.u64 = cvmx_read_csr(CVMX_SMIX_EN(0)); - if (!smix_en.s.en) { - smix_en.s.en = 1; - cvmx_write_csr(CVMX_SMIX_EN(0), smix_en.u64); - } - - /* Newer chips actually have two SMI/MDIO interfaces */ - if (!OCTEON_IS_MODEL(OCTEON_CN3XXX) && - !OCTEON_IS_MODEL(OCTEON_CN58XX) && - !OCTEON_IS_MODEL(OCTEON_CN50XX)) { - smix_en.u64 = cvmx_read_csr(CVMX_SMIX_EN(1)); - if (!smix_en.s.en) { - smix_en.s.en = 1; - cvmx_write_csr(CVMX_SMIX_EN(1), smix_en.u64); - } - } - cvmx_pko_initialize_global(); for (interface = 0; interface < num_interfaces; interface++) { result |= cvmx_helper_interface_probe(interface); |