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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-20 08:25:31 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-04-20 08:25:31 -0700 |
commit | 854da238752775ba399890f54d4ef75f57c6aae8 (patch) | |
tree | b8e20b8eb91749cf79218173f9bb2f250d038a25 /arch/mips/include/asm/io.h | |
parent | d08de37b8c3ec9d650a346b50cf3698c5b00a6bc (diff) | |
parent | b3d7e55c3f886493235bfee08e1e5a4a27cbcce8 (diff) | |
download | linux-854da238752775ba399890f54d4ef75f57c6aae8.tar.gz linux-854da238752775ba399890f54d4ef75f57c6aae8.tar.bz2 linux-854da238752775ba399890f54d4ef75f57c6aae8.zip |
Merge tag 'mips_fixes_4.17_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips
Pull MIPS fixes from James Hogan:
- io: Add barriers to read*() & write*()
- dts: Fix boston PCI bus DTC warnings (4.17)
- memset: Several corner case fixes (one 3.10, others longer)
* tag 'mips_fixes_4.17_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/mips:
MIPS: uaccess: Add micromips clobbers to bzero invocation
MIPS: memset.S: Fix clobber of v1 in last_fixup
MIPS: memset.S: Fix return of __clear_user from Lpartial_fixup
MIPS: memset.S: EVA & fault support for small_memset
MIPS: dts: Boston: Fix PCI bus dtc warnings:
MIPS: io: Add barrier after register read in readX()
MIPS: io: Prevent compiler reordering writeX()
Diffstat (limited to 'arch/mips/include/asm/io.h')
-rw-r--r-- | arch/mips/include/asm/io.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 0cbf3af37eca..a7d0b836f2f7 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -307,7 +307,7 @@ static inline void iounmap(const volatile void __iomem *addr) #if defined(CONFIG_CPU_CAVIUM_OCTEON) || defined(CONFIG_LOONGSON3_ENHANCEMENT) #define war_io_reorder_wmb() wmb() #else -#define war_io_reorder_wmb() do { } while (0) +#define war_io_reorder_wmb() barrier() #endif #define __BUILD_MEMORY_SINGLE(pfx, bwlq, type, irq) \ @@ -377,6 +377,8 @@ static inline type pfx##read##bwlq(const volatile void __iomem *mem) \ BUG(); \ } \ \ + /* prevent prefetching of coherent DMA data prematurely */ \ + rmb(); \ return pfx##ioswab##bwlq(__mem, __val); \ } |