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author | Wu Zhangjin <wuzhangjin@gmail.com> | 2009-07-02 23:26:08 +0800 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2009-09-17 20:07:47 +0200 |
commit | 8e4971175acc910eb4258df82a6bd8f2c4e4e5b5 (patch) | |
tree | 921d53308d0a8a8e9119ec6b262a01fe0ccd1fd5 /arch/mips/include | |
parent | 67b35e5d01aba7a83f2161b0c90acb08afa01e3e (diff) | |
download | linux-8e4971175acc910eb4258df82a6bd8f2c4e4e5b5.tar.gz linux-8e4971175acc910eb4258df82a6bd8f2c4e4e5b5.tar.bz2 linux-8e4971175acc910eb4258df82a6bd8f2c4e4e5b5.zip |
MIPS: Loongson: Change naming methods
To make source code of loongson sharable to the machines(such as gdium)
made by the other companies, we rename arch/mips/lemote to
arch/mips/loongson, asm/mach-lemote to asm/mach-loongson, and rename lm2e
to the name of the machine: fuloong-2e. accordingly, FULONG are renamed to
FULOONG2E to make it distinguishable to the future FULOONG2F. and also,
some other relative tuning is needed.
Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h (renamed from arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h) | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/dma-coherence.h (renamed from arch/mips/include/asm/mach-lemote/dma-coherence.h) | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/loongson.h (renamed from arch/mips/include/asm/mach-lemote/loongson.h) | 3 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/mc146818rtc.h (renamed from arch/mips/include/asm/mach-lemote/mc146818rtc.h) | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/pci.h (renamed from arch/mips/include/asm/mach-lemote/pci.h) | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mach-loongson/war.h (renamed from arch/mips/include/asm/mach-lemote/war.h) | 6 | ||||
-rw-r--r-- | arch/mips/include/asm/mips-boards/bonito64.h | 2 |
7 files changed, 16 insertions, 19 deletions
diff --git a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h index 550a10dc9dba..ce5b6e270e3f 100644 --- a/arch/mips/include/asm/mach-lemote/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson/cpu-feature-overrides.h @@ -13,8 +13,8 @@ * loongson2f user manual. */ -#ifndef __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H +#ifndef __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H +#define __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H #define cpu_dcache_line_size() 32 #define cpu_icache_line_size() 32 @@ -56,4 +56,4 @@ #define cpu_has_watch 1 #define cpu_icache_snoops_remote_store 1 -#endif /* __ASM_MACH_LEMOTE_CPU_FEATURE_OVERRIDES_H */ +#endif /* __ASM_MACH_LOONGSON_CPU_FEATURE_OVERRIDES_H */ diff --git a/arch/mips/include/asm/mach-lemote/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h index c8de5e750777..71a6851ba833 100644 --- a/arch/mips/include/asm/mach-lemote/dma-coherence.h +++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h @@ -8,8 +8,8 @@ * Author: Fuxin Zhang, zhangfx@lemote.com * */ -#ifndef __ASM_MACH_LEMOTE_DMA_COHERENCE_H -#define __ASM_MACH_LEMOTE_DMA_COHERENCE_H +#ifndef __ASM_MACH_LOONGSON_DMA_COHERENCE_H +#define __ASM_MACH_LOONGSON_DMA_COHERENCE_H struct device; @@ -65,4 +65,4 @@ static inline int plat_device_is_coherent(struct device *dev) return 0; } -#endif /* __ASM_MACH_LEMOTE_DMA_COHERENCE_H */ +#endif /* __ASM_MACH_LOONGSON_DMA_COHERENCE_H */ diff --git a/arch/mips/include/asm/mach-lemote/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index 95ee4c8f2d56..e9f74dee24ef 100644 --- a/arch/mips/include/asm/mach-lemote/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h @@ -21,9 +21,6 @@ /* loongson internal northbridge initialization */ extern void bonito_irq_init(void); -/* loongson-based machines specific reboot setup */ -extern void mips_reboot_setup(void); - /* environment arguments from bootloader */ extern unsigned long bus_clock, cpu_clock_freq; extern unsigned long memsize, highmemsize; diff --git a/arch/mips/include/asm/mach-lemote/mc146818rtc.h b/arch/mips/include/asm/mach-loongson/mc146818rtc.h index ed5147e11085..ed7fe978335a 100644 --- a/arch/mips/include/asm/mach-lemote/mc146818rtc.h +++ b/arch/mips/include/asm/mach-loongson/mc146818rtc.h @@ -7,8 +7,8 @@ * * RTC routines for PC style attached Dallas chip. */ -#ifndef __ASM_MACH_LEMOTE_MC146818RTC_H -#define __ASM_MACH_LEMOTE_MC146818RTC_H +#ifndef __ASM_MACH_LOONGSON_MC146818RTC_H +#define __ASM_MACH_LOONGSON_MC146818RTC_H #include <linux/io.h> @@ -33,4 +33,4 @@ static inline void CMOS_WRITE(unsigned char data, unsigned long addr) #define mc146818_decode_year(year) ((year) < 70 ? (year) + 2000 : (year) + 1970) #endif -#endif /* __ASM_MACH_LEMOTE_MC146818RTC_H */ +#endif /* __ASM_MACH_LOONGSON_MC146818RTC_H */ diff --git a/arch/mips/include/asm/mach-lemote/pci.h b/arch/mips/include/asm/mach-loongson/pci.h index 3e6b1300afb6..e229b2904cc9 100644 --- a/arch/mips/include/asm/mach-lemote/pci.h +++ b/arch/mips/include/asm/mach-loongson/pci.h @@ -19,8 +19,8 @@ * 02139, USA. */ -#ifndef __ASM_MACH_LEMOTE_PCI_H_ -#define __ASM_MACH_LEMOTE_PCI_H_ +#ifndef __ASM_MACH_LOONGSON_PCI_H_ +#define __ASM_MACH_LOONGSON_PCI_H_ extern struct pci_ops bonito64_pci_ops; @@ -28,4 +28,4 @@ extern struct pci_ops bonito64_pci_ops; #define LOONGSON2E_PCI_MEM_END (BONITO_PCILO1_BASE + 0x04000000 * 2) #define LOONGSON2E_PCI_IO_START 0x00004000UL -#endif /* !__ASM_MACH_LEMOTE_PCI_H_ */ +#endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ diff --git a/arch/mips/include/asm/mach-lemote/war.h b/arch/mips/include/asm/mach-loongson/war.h index 05f89e0f2a11..4b971c3ffd8d 100644 --- a/arch/mips/include/asm/mach-lemote/war.h +++ b/arch/mips/include/asm/mach-loongson/war.h @@ -5,8 +5,8 @@ * * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> */ -#ifndef __ASM_MIPS_MACH_LEMOTE_WAR_H -#define __ASM_MIPS_MACH_LEMOTE_WAR_H +#ifndef __ASM_MACH_LOONGSON_WAR_H +#define __ASM_MACH_LOONGSON_WAR_H #define R4600_V1_INDEX_ICACHEOP_WAR 0 #define R4600_V1_HIT_CACHEOP_WAR 0 @@ -22,4 +22,4 @@ #define R10000_LLSC_WAR 0 #define MIPS34K_MISSED_ITLB_WAR 0 -#endif /* __ASM_MIPS_MACH_LEMOTE_WAR_H */ +#endif /* __ASM_MACH_LEMOTE_WAR_H */ diff --git a/arch/mips/include/asm/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h index a0f04bb99c99..a576ce044c3c 100644 --- a/arch/mips/include/asm/mips-boards/bonito64.h +++ b/arch/mips/include/asm/mips-boards/bonito64.h @@ -26,7 +26,7 @@ /* offsets from base register */ #define BONITO(x) (x) -#elif defined(CONFIG_LEMOTE_FULONG) +#elif defined(CONFIG_LEMOTE_FULOONG2E) #define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x))) #define BONITO_IRQ_BASE 32 |