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| author | Paul Cercueil <paul@crapouillou.net> | 2018-01-16 16:48:01 +0100 |
|---|---|---|
| committer | James Hogan <jhogan@kernel.org> | 2018-01-18 22:07:31 +0000 |
| commit | 9be5f3e92ed5a4176bb4d99b498dc87aaafa622b (patch) | |
| tree | 91297e21557985dc958ac8fd1fefc174e8177c55 /arch/mips/jz4740 | |
| parent | ce0d60f731f0011a3e0b6e7d17a01f229313d2a0 (diff) | |
| download | linux-9be5f3e92ed5a4176bb4d99b498dc87aaafa622b.tar.gz linux-9be5f3e92ed5a4176bb4d99b498dc87aaafa622b.tar.bz2 linux-9be5f3e92ed5a4176bb4d99b498dc87aaafa622b.zip | |
MIPS: ingenic: Initial JZ4770 support
Provide just enough bits (clocks, clocksource, uart) to allow a kernel
to boot on the JZ4770 SoC to a initramfs userspace.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Maarten ter Huurne <maarten@treewalker.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/18487/
Signed-off-by: James Hogan <jhogan@kernel.org>
Diffstat (limited to 'arch/mips/jz4740')
| -rw-r--r-- | arch/mips/jz4740/Kconfig | 6 | ||||
| -rw-r--r-- | arch/mips/jz4740/time.c | 2 |
2 files changed, 7 insertions, 1 deletions
diff --git a/arch/mips/jz4740/Kconfig b/arch/mips/jz4740/Kconfig index 643af2012e14..29a9361a2b77 100644 --- a/arch/mips/jz4740/Kconfig +++ b/arch/mips/jz4740/Kconfig @@ -18,6 +18,12 @@ config MACH_JZ4740 bool select SYS_HAS_CPU_MIPS32_R1 +config MACH_JZ4770 + bool + select MIPS_CPU_SCACHE + select SYS_HAS_CPU_MIPS32_R2 + select SYS_SUPPORTS_HIGHMEM + config MACH_JZ4780 bool select MIPS_CPU_SCACHE diff --git a/arch/mips/jz4740/time.c b/arch/mips/jz4740/time.c index bb1ad5119da4..2ca9160f642a 100644 --- a/arch/mips/jz4740/time.c +++ b/arch/mips/jz4740/time.c @@ -113,7 +113,7 @@ static struct clock_event_device jz4740_clockevent = { #ifdef CONFIG_MACH_JZ4740 .irq = JZ4740_IRQ_TCU0, #endif -#ifdef CONFIG_MACH_JZ4780 +#if defined(CONFIG_MACH_JZ4770) || defined(CONFIG_MACH_JZ4780) .irq = JZ4780_IRQ_TCU2, #endif }; |