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| author | James Hogan <james.hogan@imgtec.com> | 2015-05-19 09:50:35 +0100 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2015-06-21 21:52:35 +0200 |
| commit | 48269c78fb04a84b4d190cac8e1fbf24ded53505 (patch) | |
| tree | e67c274158fc49626b1bc4934781e30521f16d97 /arch/mips/lib/dump_tlb.c | |
| parent | d7f5499dc22fbb45e9e6bab53be5e3b241122444 (diff) | |
| download | linux-48269c78fb04a84b4d190cac8e1fbf24ded53505.tar.gz linux-48269c78fb04a84b4d190cac8e1fbf24ded53505.tar.bz2 linux-48269c78fb04a84b4d190cac8e1fbf24ded53505.zip | |
MIPS: dump_tlb: Take global bit into account
The TLB only matches the ASID when the global bit isn't set, so
dump_tlb() shouldn't really be skipping global entries just because the
ASID doesn't match. Fix the condition to read the TLB entry's global bit
from EntryLo0. Note that after a TLB read the global bits in both
EntryLo registers reflect the same global bit in the TLB entry.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/10079/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/lib/dump_tlb.c')
| -rw-r--r-- | arch/mips/lib/dump_tlb.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/arch/mips/lib/dump_tlb.c b/arch/mips/lib/dump_tlb.c index f02cc554d720..995c393e3342 100644 --- a/arch/mips/lib/dump_tlb.c +++ b/arch/mips/lib/dump_tlb.c @@ -73,7 +73,15 @@ static void dump_tlb(int first, int last) */ if ((entryhi & ~0x1ffffUL) == CKSEG0) continue; - if ((entryhi & 0xff) != asid) + /* + * ASID takes effect in absence of G (global) bit. + * We check both G bits, even though architecturally they should + * match one another, because some revisions of the SB1 core may + * leave only a single G bit set after a machine check exception + * due to duplicate TLB entry. + */ + if (!((entrylo0 | entrylo1) & MIPS_ENTRYLO_G) && + (entryhi & 0xff) != asid) continue; /* |