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authorAndrew Bresticker <abrestic@chromium.org>2014-10-20 12:03:50 -0700
committerRalf Baechle <ralf@linux-mips.org>2014-11-24 07:44:58 +0100
commit327b8c89d4aec9871626415868c8312b9722f2b8 (patch)
treed1827865e4b7c8c963f61473e4269405709485fa /arch/mips/mti-sead3
parent387904ff84caeeff5aa5aad43aef4d0e5ce4bb24 (diff)
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MIPS: SEAD3: Stop using GIC REG macros
Stop using the REG macros from gic.h and instead use proper iomem accessors. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8125/ Patchwork: https://patchwork.linux-mips.org/patch/8228/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/mti-sead3')
-rw-r--r--arch/mips/mti-sead3/sead3-int.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/mips/mti-sead3/sead3-int.c b/arch/mips/mti-sead3/sead3-int.c
index 69ae185a76c5..02bf0dba1127 100644
--- a/arch/mips/mti-sead3/sead3-int.c
+++ b/arch/mips/mti-sead3/sead3-int.c
@@ -20,16 +20,16 @@
#define SEAD_CONFIG_BASE 0x1b100110
#define SEAD_CONFIG_SIZE 4
-static unsigned long sead3_config_reg;
+static void __iomem *sead3_config_reg;
void __init arch_init_irq(void)
{
if (!cpu_has_veic)
mips_cpu_irq_init();
- sead3_config_reg = (unsigned long)ioremap_nocache(SEAD_CONFIG_BASE,
- SEAD_CONFIG_SIZE);
- gic_present = (REG32(sead3_config_reg) & SEAD_CONFIG_GIC_PRESENT_MSK) >>
+ sead3_config_reg = ioremap_nocache(SEAD_CONFIG_BASE, SEAD_CONFIG_SIZE);
+ gic_present = (__raw_readl(sead3_config_reg) &
+ SEAD_CONFIG_GIC_PRESENT_MSK) >>
SEAD_CONFIG_GIC_PRESENT_SHF;
pr_info("GIC: %spresent\n", (gic_present) ? "" : "not ");
pr_info("EIC: %s\n",